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TSA5523M Datasheet(PDF) 2 Page - NXP Semiconductors |
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TSA5523M Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 20 page 1996 Dec 17 2 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M FEATURES • Complete 1.4 GHz single-chip system • Adaptive DC/DC converter driver output • On-board tuning amplifier output • Varicap drive disable • Four NPN open-collector output ports (10 mA) • Four bus-controlled bidirectional ports (NPN open-collector outputs) • In-lock detector • 5-step Analog-to-Digital Converter (ADC) • Mixer/Oscillator (M/O) band-switch output • 15-bit programmable divider • Programmable reference divider ratio (512, 640 or 1024) • Programmable charge-pump current (50 or 250 µA) • I2C-bus format – Address plus four data bytes transmission (write mode) – Address plus one status byte transmission (read mode) – Four independent addresses • Low power, low radiation. GENERAL DESCRIPTION The device is a single chip PLL frequency synthesizer designed for TV and VCR tuning systems. The circuit consists of a divide-by-eight prescaler with its own preamplifier, a 15-bit programmable divider, a crystal oscillator and its programmable reference divider, a phase/frequency detector combined with a charge-pump which drives the tuning amplifier, including 33 V output. Three NPN open-collector outputs are provided for band switching together with five open-collector NPN outputs. Four of these ports can also be used as input ports (one ADC and three general purpose I/O ports). An output is provided to control a Philips mixer/oscillator IC controlled by bits P7, P5 and P4. Depending on the reference divider ratio (512, 640 or 1024), the phase comparator operates at 3.90625, 6.25 or 7.8125 kHz with a 4 MHz crystal. The lock detector bit FL is set to logic 1 when the loop is locked and is read on the SDA line (status byte) during a read operation. The ADC is available for digital AFC control. The ADC code is read during a read operation on the I2C-bus. The ADC input is combined with the port P6. In the test mode, this port is also used as a test output for fref and fdiv/2 (see Table 4). In addition, the circuit includes a DC/DC converter driver connected to the IDC pin to control the amplitude of an external oscillator followed by a voltage rectifier. The voltage rectifier is used to generate the correct tuning supply voltage to maintain a constant current into the tuning amplifier. The DC/DC converter driver can be disabled by setting the IDC pin to VCC1 in this event the tuning supply voltage is delivered by a fixed 33 V supply. Five serial bytes (including address byte) are required to address the device, select the VCO frequency, program the ports, set the charge-pump current and set the reference divider ratio. The device has four independent I2C-bus addresses which can be selected by applying a specific voltage on the AS input (see Table 3). APPLICATIONS • Multimedia TV tuners and front-ends • VCR tuners. ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TSA5523M/C1 SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1 |
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