8
04-02-037D
PEEL
TM 22LV10AZ
Table 6 - A.C. Electrical Characteristics
(Over the operating range
9)
-25
I-35
3V
±±±±10% 3.3V±±±±10% 3V±±±±10% 3.3V±±±±10%
Symbol
Parameter
Min Max Min Max Min Max Min Max
Units
tPD
Input
6 to non-registered output in continuous
mode
13
30
25
40
35
ns
tOE
Input
6 to output enable7
30
25
40
35
ns
tOD
Input
6 to output disable7
30
25
40
35
ns
tCO1
Clock to output
20
15
28
25
ns
tCO2
Clock to comb. Output delay via internal
registered feedback
40
35
56
49
ns
tCF
Clock to Feedback
14
9
20
13
ns
tSC
Input
6 or feedback setup to clock
20
15
28
21
ns
tHC
Input
6 hold after clock
0
0
0
0
ns
tCL, tCH
Clock low time, clock high time
9
20
13
28
18
ns
tCP
Min clock period Ext (tSC + tCO1)
40
30
56
39
ns
fMAX1
Internal feedback 1/ (tSC + tCF)
12
29.4
41.6
20.8
29.4
MHz
fMAX2
External Feedback (1/ tCP)
12
25
33.3
17.9
25.6
MHz
fMAX3
No Feedback 1/ (tCL + tCH)
12
25
38.4
17.9
27.7
MHz
tAW
Asynchronous Reset Pulse Width
30
25
40
35
ns
tAP
Input to Asynchronous Reset
30
25
40
35
ns
tAR
Asynchronous Reset recovery time
30
25
40
35
ns
tRESET
Power-on reset time for registers in clear state
14
5
5
5
5
µs
Inpu ts I/O ,
R egistered F eedback,
Synchronous Preset
Clock
Asyn chronou s
Rese t
R egistered
Outp uts
C om binatoria l
Outp uts
Figure 7 - Switching Waveforms
Notes:
1.
Minimum DC input is -0.5V, however, inputs may undershoot to -
2.0V for periods less than 20 ns.
2.
VI and VO are not specified for program/verify operation.
3.
The Supply Voltage range of 2.7 to 3.6V was chosen to allow
this part to be used in both 3V 10% and 3.3V 10% applications.
4.
Test Points for Clock and VCC in tR and tF are referenced at the
10% and 90% levels.
5.
I/O pins are 0V and VCC.
6.
"Input" refers to an input pin signal.
7.
tOE is measured from input transition to VREF 0.1V, TOD is
measured from input transition to VOH -0.1V or VOL +0.1V; VREF
=VL
8.
Capacitances are tested on a sample basis.
9.
Test conditions assume: signal transition times of 3ns or less
from the 10% and 90% points, timing reference levels of 1.5V
(Unless otherwise specified).
10. Test one output at a time for duration of less than 1 second.
11. ICC for a typical application: This parameter is tested with the
device programmed as a 10-bit Counter.
12. Parameters are not 100% tested. Specifications are based on
initial characterization and are tested after any design process
modification that might affect operational frequency.
13. tPD, tOE, tOD, tCO, tSC, and tAP are approximately 5 ns, slower on the
first transaction from sleep mode.
14. All inputs at GND.
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