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C8051F067 Datasheet(PDF) 9 Page - Silicon Laboratories |
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C8051F067 Datasheet(HTML) 9 Page - Silicon Laboratories |
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9 / 328 page  C8051F060/1/2/3/4/5/6/7 Rev. 1.2 9 List of Figures 1. System Overview.................................................................................................... 19 Figure 1.1. C8051F060 / C8051F062 Block Diagram .............................................. 21 Figure 1.2. C8051F061 / C8051F063 Block Diagram .............................................. 22 Figure 1.3. C8051F064 / C8051F066 Block Diagram .............................................. 23 Figure 1.4. C8051F065 / C8051F067 Block Diagram .............................................. 24 Figure 1.5. Comparison of Peak MCU Execution Speeds ....................................... 25 Figure 1.6. On-Board Clock and Reset .................................................................... 26 Figure 1.7. On-Chip Memory Map............................................................................ 27 Figure 1.8. Development/In-System Debug Diagram............................................... 28 Figure 1.9. Digital Crossbar Diagram ....................................................................... 29 Figure 1.10. PCA Block Diagram.............................................................................. 30 Figure 1.11. CAN Controller Overview ..................................................................... 31 Figure 1.12. 16-Bit ADC Block Diagram ................................................................... 33 Figure 1.13. 10-Bit ADC Diagram............................................................................. 34 Figure 1.14. DAC System Block Diagram ................................................................ 35 Figure 1.15. Comparator Block Diagram .................................................................. 36 2. Absolute Maximum Ratings .................................................................................. 37 3. Global DC Electrical Characteristics .................................................................... 38 4. Pinout and Package Definitions............................................................................ 39 Figure 4.1. C8051F060 / C8051F062 Pinout Diagram (TQFP-100)......................... 45 Figure 4.2. C8051F064 / C8051F066 Pinout Diagram (TQFP-100)......................... 46 Figure 4.3. TQFP-100 Package Drawing ................................................................. 47 Figure 4.4. C8051F061 / C8051F063 Pinout Diagram (TQFP-64)........................... 48 Figure 4.5. C8051F065 / C8051F067 Pinout Diagram (TQFP-64)........................... 49 Figure 4.6. TQFP-64 Package Drawing ................................................................... 50 5. 16-Bit ADCs (ADC0 and ADC1) ............................................................................. 51 Figure 5.1. 16-Bit ADC0 and ADC1 Control Path Diagram ...................................... 51 Figure 5.2. 16-bit ADC0 and ADC1 Data Path Diagram .......................................... 52 Figure 5.3. Voltage Reference Block Diagram ......................................................... 53 Figure 5.4. ADC Track and Conversion Example Timing......................................... 55 Figure 5.5. ADC0 and ADC1 Equivalent Input Circuits ............................................ 56 Figure 5.6. AMX0SL: AMUX Configuration Register................................................ 57 Figure 5.7. ADC0CF: ADC0 Configuration Register ................................................ 58 Figure 5.8. ADC1CF: ADC1 Configuration Register ................................................ 59 Figure 5.9. ADC0CN: ADC0 Control Register.......................................................... 60 Figure 5.10. ADC1CN: ADC1 Control Register ........................................................ 61 Figure 5.11. REF0CN: Reference Control Register 0 .............................................. 62 Figure 5.12. REF1CN: Reference Control Register 1 .............................................. 62 Figure 5.13. ADC0H: ADC0 Data Word MSB Register ............................................ 63 Figure 5.14. ADC0L: ADC0 Data Word LSB Register.............................................. 63 Figure 5.15. ADC0 Data Word Example................................................................... 64 Figure 5.16. ADC1H: ADC1 Data Word MSB Register ............................................ 65 |
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