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FAIXF972MLCA4 Datasheet(PDF) 53 Page - Intel Corporation |
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FAIXF972MLCA4 Datasheet(HTML) 53 Page - Intel Corporation |
53 / 92 page Intel ® LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet 53 Document Number: 302875-005 Revision Date: 27-Oct-2005 5.9.3 LED Functions The LXT972M Transceiver has these direct LED driver pins: LED/CFG1, LED/CFG2, and LED/ CFG3. On power-up, all the drivers are asserted for approximately 1 second after reset de-asserts. Each LED driver can be programmed using the LED Configuration Register (Table 54, “LED Configuration Register - Address 20, Hex 14” on page 87) to indicate one of the following conditions: • Collision Condition • Duplex Mode • Link Status • Operating Speed • Receive Activity • Transmit Activity The LED drivers can also be programmed to display various combined status conditions. For example, setting Register bits 20.15:12 to ‘1101’ produces the following combination of Link and Activity indications: • If Link is down, LED is off. If activity is detected from the MAC, the LED still blinks even if the link is down. • If Link is up, LED is on. • If Link is up and activity is detected, the LED blinks at the stretch interval selected by Register bits 20.3:2 and continues to blink as long as activity is present. For the LXT972M Transceiver, the LED driver pins also provide initial configuration settings. The LED pins are sensitive to polarity and automatically pull up or pull down to configure for either open drain or open collector circuits (10 mA Max current rating) as required by the hardware configuration. For details, see the discussion of “Hardware Configuration Settings” on page 33. |
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