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CD74HCT4040 Datasheet(PDF) 1 Page - Texas Instruments

Part No. CD74HCT4040
Description  High-Speed CMOS Logic 12-Stage Binary Counter
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD74HCT4040 Datasheet(HTML) 1 Page - Texas Instruments

 
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Data sheet acquired from Harris Semiconductor
SCHS203D
Features
• Fully Static Operation
• Buffered Inputs
• Common Reset
• Negative Edge Pulsing
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The ’HC4040 and ’HCT4040 are 14-stage ripple-carry
binary counters. All counter stages are master-slave flip-
flops. The state of the stage advances one count on the
negative clock transition of each input pulse; a high voltage
level on the MR line resets all counters to their zero state. All
inputs and outputs are buffered.
Pinout
CD54HC4040, CD54HCT4040
(CERDIP)
CD74HC4040
(PDIP, SOIC, SOP)
CD74HCT4040
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC4040F3A
-55 to 125
16 Ld CERDIP
CD54HCT4040F3A
-55 to 125
16 Ld CERDIP
CD74HC4040E
-55 to 125
16 Ld PDIP
CD74HC4040M
-55 to 125
16 Ld SOIC
CD74HC4040MT
-55 to 125
16 Ld SOIC
CD74HC4040M96
-55 to 125
16 Ld SOIC
CD74HC4040NSR
-55 to 125
16 Ld SOP
CD74HCT4040E
-55 to 125
16 Ld PDIP
CD74HCT4040M
-55 to 125
16 Ld SOIC
CD74HCT4040MT
-55 to 125
16 Ld SOIC
CD74HCT4040M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
Q12
Q6
Q5
Q7
Q4
Q3
GND
Q2
VCC
Q10
Q8
Q9
MR
CP
Q1
Q11
February 1998 - Revised October 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC4040, CD74HC4040,
CD54HCT4040, CD74HCT4040
High-Speed CMOS Logic
12-Stage Binary Counter
[ /Title
(CD74H
C4040,
CD74HC
T4040)
/Subject
(High
Speed
CMOS
Logic
12-Stage
Binary


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