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DJLXT972MPCA4 Datasheet(PDF) 11 Page - Intel Corporation |
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DJLXT972MPCA4 Datasheet(HTML) 11 Page - Intel Corporation |
11 / 92 page Intel ® LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet 11 Document Number: 302875-005 Revision Date: 27-Oct-2005 2.0 Block Diagram for Intel® LXT972M Transceiver Figure 1 is a block diagram of the LXT972M Transceiver. (This block diagram is the same as the block diagram on the first page of this document. This copy of the block diagram appears here as a convenience to the reader.) Figure 1. Intel ® LXT972M Transceiver Block Diagram TX_EN RX_ER CRS Power Supply Management / Mode Select Logic ADDR[1:0] MDIO MDC RX_DV TPON TPOP TPIN TPIP REFCLK/XI VCC GND COL RX_CLK TX_CLK TXD[3:0] Decoder & Descrambler + - Serial-to- Parallel Converter Scrambler & Encoder Parallel/Serial Converter Carrier Sense Data Valid Error Detect Auto Negotiation Manchester Decoder Manchester Encoder 10 100 10 100 Media Select TP Driver TP Out Register Set Register Set Clock Generator + - 10BT Collision Detect Clock Generator OSP Adaptive EQ with Baseline Wander Cancellation OSP Slicer OSP Pulse Shaper RXD[3:0] + - 100TX TP In JTAG 5 TDO TMS TCK TRST_L RESET_L B3387-13 LED/CFG[3:1] TDI XO |
Similar Part No. - DJLXT972MPCA4 |
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Similar Description - DJLXT972MPCA4 |
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