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TDA9853H Datasheet(PDF) 12 Page - NXP Semiconductors

Part # TDA9853H
Description  I2C-bus controlled economic BTSC stereo decoder and audio processor
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9853H Datasheet(HTML) 12 Page - NXP Semiconductors

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2000 Dec 11
12
Philips Semiconductors
Product specification
I2C-bus controlled economic BTSC stereo
decoder and audio processor
TDA9853H
Notes
1. The oscillator is designed to operate together with Murata resonator CSB503F58 or CSB503JF958 as SMD. Change
of the resonator supplier is possible, but the resonator specification must be close to the specified ones.
2. 1.5 dB step error between
−15 and −16 dB.
3. The AVL input voltage is internal. It corresponds to the output voltage OUTL and OUTR at AVL off.
4. The listed pin voltage corresponds with typical gain steps of +6 dB, +3 dB, 0 dB,
−6 dB and −15 dB.
5. Attack time constant = CCAV × Ratt with CCAV = C8 (see Fig.1).
6.
a) Example: CCAV = 4.7 µF; Idec =2 µA; G1 = −9 dB; G2 =+6dB → decay time results in 4.14 s.
7. When reset is active the GMU bit (mute) is set and the I2C-bus receiver is in the reset position.
8. The AC characteristics are in accordance with the I2C-bus specification for standard mode (clock frequency
maximum 100 kHz). A higher frequency, up to 280 kHz, can be used if all clock and data times are interpolated
between standard mode (100 kHz) and fast mode (400 kHz) in accordance with the I2C-bus specification.
Information about the I2C-bus can be found in brochure
“I2C-bus and how to use it” (order number 9398 393 40011).
9. Maximum 9 V if VCC >9V.
Monitor output; pins VAL and VAR
VO
DC output voltage
0.5VCC
V
RL
output load resistance
5
−−
k
CL
output load capacitance
with 100
Ω in series
−−
2.5
nF
Muting at power supply voltage drop for OUTR and OUTL
∆VCC
supply voltage drop for mute
active
VCAP − 0.7 −
V
Power-on reset; note 7
VPOR(start)
start of reset voltage
increasing supply voltage
−−
2.5
V
decreasing supply voltage
tbf
V
VPOR(end)
end of reset voltage
increasing supply voltage
tbf
V
Digital part (I2C-bus pins); note 8
VIH
HIGH-level input voltage
3
VCC(9)
V
VIL
LOW-level input voltage
−0.3
+1.5
V
IIH
HIGH-level input current
−10
+10
µA
IIL
LOW-level input current
−10
+10
µA
VOL
LOW-level output voltage
IIL =3mA
−−
0.4
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Decay time
C
CAV
0.76 V
×
10
G
1
20
----------
10
G
2
20
----------



I
dec
---------------------------------------------------------------------------------
=


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