DS26334_07 datasheet(2/121 Pages) DALLAS

Part #	DS26334

Description	3.3V, 16-Channel, E1/T1/J1 Shortand Long-Haul Line Interface Unit

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Manufacturer	DALLAS [Dallas Semiconductor]

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DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit

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TABLE OF CONTENTS

1

STANDARDS COMPLIANCE ...........................................................................................................6

1.1

TELECOM SPECIFICATIONS COMPLIANCE..........................................................................................6

2

DETAILED DESCRIPTION ...............................................................................................................7

3

BLOCK DIAGRAMS .........................................................................................................................8

4

PIN DESCRIPTION .........................................................................................................................10

5

FUNCTIONAL DESCRIPTION........................................................................................................17

5.1

PORT OPERATION .........................................................................................................................17

5.1.1

Serial Port Operation .......................................................................................................................... 17

5.1.2

Parallel Port Operation........................................................................................................................ 18

5.1.3

Interrupt Handling ............................................................................................................................... 18

5.2

POWER-UP AND RESET .................................................................................................................19

5.3

MASTER CLOCK ............................................................................................................................19

5.4

TRANSMITTER ...............................................................................................................................20

5.4.1

Transmit Line Templates .................................................................................................................... 22

5.4.2

LIU Transmit Front-End ...................................................................................................................... 25

5.4.3

Transmit Dual-Rail Mode .................................................................................................................... 26

5.4.4

Transmit Single-Rail Mode.................................................................................................................. 26

5.4.5

Zero Suppression—B8ZS or HDB3 .................................................................................................... 26

5.4.6

Transmit Power-Down ........................................................................................................................ 26

5.4.7

Transmit All Ones................................................................................................................................ 27

5.4.8

Driver Fail Monitor............................................................................................................................... 27

5.5

RECEIVER .....................................................................................................................................27

5.5.1

Receiver Impedance Matching Calibration ......................................................................................... 27

5.5.2

Receiver Monitor Mode....................................................................................................................... 27

5.5.3

Peak Detector and Slicer .................................................................................................................... 28

5.5.4

Receive Level Indicator....................................................................................................................... 28

5.5.5

Clock and Data Recovery ................................................................................................................... 28

5.5.6

Loss of Signal...................................................................................................................................... 28

5.5.7

AIS ...................................................................................................................................................... 29

5.5.8

Receive Dual-Rail Mode ..................................................................................................................... 30

5.5.9

Receive Single-Rail Mode................................................................................................................... 30

5.5.10 Bipolar Violation and Excessive Zero Detector................................................................................... 30

5.6

JITTER ATTENUATOR .....................................................................................................................31

5.7

G.772 MONITOR ...........................................................................................................................32

5.8

LOOPBACKS ..................................................................................................................................32

5.8.1

Analog Loopback ................................................................................................................................ 32

5.8.2

Digital Loopback.................................................................................................................................. 33

5.8.3

Remote Loopback ............................................................................................................................... 33

5.9

BERT...........................................................................................................................................34

5.9.1

General Description ............................................................................................................................ 34

5.9.2

Configuration and Monitoring.............................................................................................................. 35

5.9.3

Receive Pattern Detection .................................................................................................................. 36

5.9.4

Transmit Pattern Generation............................................................................................................... 38

6

REGISTER MAPS AND DEFINITION.............................................................................................39

6.1

REGISTER DESCRIPTION ...............................................................................................................48

6.1.1

Primary Register Bank ........................................................................................................................ 48

6.1.2

Secondary Register Bank ................................................................................................................... 63

6.1.3

Individual LIU Register Bank............................................................................................................... 66

6.1.4

BERT Registers .................................................................................................................................. 85

7

JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT ...................................92

7.1

TAP CONTROLLER STATE MACHINE ..............................................................................................93

7.1.1

Test-Logic-Reset................................................................................................................................. 93

7.1.2

Run-Test-Idle ...................................................................................................................................... 93

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