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DSPIC33FJ256GP510 Datasheet(PDF) 7 Page - Microchip Technology |
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DSPIC33FJ256GP510 Datasheet(HTML) 7 Page - Microchip Technology |
7 / 10 page © 2006 Microchip Technology Inc. DS80279B-page 7 dsPIC33F 16. Module: INT0, ADC and Sleep/Idle Mode ADC event triggers from the INT0 pin will not wake-up the device from Sleep or Idle mode if the SMPI bits are non-zero. This means that if the ADC is configured to generate an interrupt after a certain number of INT0 triggered conversions, the ADC conversions will not be triggered and the device will remain in Sleep. The ADC will perform conversions and wake-up the device only if it is configured to generate an interrupt after each INT0 triggered conversion (SMPI<3:0> = 0000). Work around None. If ADC event trigger from the INT0 pin is required, initialize SMPI<3:0> to ‘0000’ (interrupt on every conversion). 17. Module: Doze Mode and Traps The address error trap, stack error trap, math error trap and DMA error trap will not wake-up a device from Doze mode. Work around None. 18. Module: JTAG Programming JTAG programming does not work. Work around None. |
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