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EVAL-AD7714-3EB Datasheet(PDF) 2 Page - Analog Devices

Part No. EVAL-AD7714-3EB
Description  Evaluation Board for Signal Conditioning ADC
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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EVAL-AD7714-3EB Datasheet(HTML) 2 Page - Analog Devices

   
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EVAL-AD7714-3EB
REV. A
–2–
Link Options
There are a number of link options on the evaluation board which should be set for the required operating setup before using the
board. The functions of these link options are described in detail below.
Link No.
Function
LK1
This option selects the master clock option for the AD7714. The master clock source comes from the on-board
crystal or from an external clock source via SKT6. This is a double link and both links must be moved together for
correct operation.
With both links in position A, the external clock option is selected and an externally applied clock to SKT 6 is routed
the MCLK IN pin of the AD7714.
With both links in position B, the on-board crystal is selected and provides the master clock for the AD7714.
LK2
This link option is used to determine whether the AD7714 is in its normal operating mode or its STANDBY (power
down) mode.
With this link in position A, the STANDBY input is connected to a logic high thus configuring the part for normal
operation.
With this link in position B, the STANDBY pin is connected to a logic low and the AD7714 is placed in its power
down mode where its power dissipation is typically 15
µW.
LK3
This link option is used to control the buffer option input on the AD7714 (i.e. determine the voltage on the AD7714
BUFFER pin).
With this link in position A, a logic high is connected to this input. This connects the on-chip buffer in series with the
analog input which allows the inputs to handle higher source impedance.
With this link in position B, a logic low is connected to the buffer option select input. With this input low, the on-chip
buffer on the analog input is shorted out.
LK4
This link controls the polarity of the serial clock.
With this link in position A, the POL pin is connected to a logic high. With this input high, the first transition of the
serial clock in a data transfer operation is from a high to a low.
With this link in position B, the POL input is connected to a logic low and the first transition of the serial clock in a
data transfer operation is from a low to a high.
LK5
This link option is used to select the reference source for the AD7714's REF IN(-) input.
With this link in position A, the REF IN(-) pin of the AD7714 is connected directly to AGND.
With this link in position B, the REF IN(-) pin of the AD7714 is connected to SKT10. An external voltage connected
to SKT10 can now be used for REF IN(-).
LK6
This link option is used to select the reference source for the AD7714's REF IN(+) input.
With this link in position A, the REF IN (+) pin of the AD7714 is connected directly to the output of the on-board
reference, the AD589.
With this link in position B, the REF IN(+) pin of the AD7714 is connected to SKT9. An external voltage connected
to SKT 9 can now be used for REF IN(+).
LK7
This link option is not used on the board.
LK8-LK13
These links are in series with the AIN 1 through AIN 6 analog inputs respectively.
With these links in place, the analog input on the relevant SKT input is connected directly to the respective AIN
input on the part. For example, with LK8 in place, the analog signal applied to SKT7 is connected directly to AIN6
of the AD7714.
These links may be removed so that the input signals at the AIN SKTs can be connected to the component grid for
signal conditioning before being applied to the analog inputs of the AD7714.


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