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EVAL-AD7714-3EB Datasheet(PDF) 3 Page - Analog Devices

Part No. EVAL-AD7714-3EB
Description  Evaluation Board for Signal Conditioning ADC
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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EVAL-AD7714-3EB Datasheet(HTML) 3 Page - Analog Devices

   
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EVAL-AD7714-3EB
REV. A
–3–
Setup Conditions
Table I shows the position in which all the links are set when the
evaluation board is sent out.
Table I. Initial Link Positions
Link No.
Position Function.
LK1
B
Both links in position B to select the
on-board crystal oscillator as the master
clock for the board.
LK2
A
Connects STANDBY high and thus
configures the part for normal
operation.
LK3
B
The on-chip buffer on the AD7714 is
shorted out.
LK4
A
Connects POL pin high such that the
first transition of the serial clock in a
data transfer is from a high to a low.
LK5
A
REF IN(-) connected directly to
AGND.
LK6
A
REF IN(+) connected to the output of
the on-board AD589 reference.
LK7
No link in place.
LK8-LK13
IN
Connects analog inputs from the input
sockets directly to the respective analog
input pins of the AD7714.
EVALUATION BOARD INTERFACING
Interfacing to the evaluation board is either via a 36-way
Centronics connector,SKT11, or a 9-way D-Type connector,
SKT1. The pinout for the SKT1 connector is given in Figure 1
and its corresponding pin designations are given in Table II.
The pinout for this SKT11 connector is shown in Figure 2 and
its pin designations are given in Table III. The evaluation board
should be powered up before a cable is connected to either of
the connectors.
SKT11 is used to connect the evaluation board to the printer
port (parallel port) of a PC. Connection between the two is
direct via a standard parallel printer port cable. SKT1 is used to
connect the evaluation board to any other system.
Figure 2. SKT1 Pin Configuration
24
3
1
5
67
8
9
Table II. SKT1 Pin Designations
1
1
SCLK
Serial Clock. The signal on this pin is buffered
before being applied to the SCLK pin of the
AD7714.
2
DRDY
Logic Output. This is a buffered version of the
signal on the AD7714's DRDY pin.
3
CS
Chip Select. The signal on this pin is buffered
before being applied to the CS pin of the
AD7714.
4
RESET
Reset Input. The signal on this pin is buffered
before being applied to the RESET pin of the
AD7714.
5
DIN
Serial Data Input. Data applied to this pin is
buffered before being applied to the AD7714's
DIN pin.
6
DGND
Ground reference point for digital circuitry.
Connects to the DGND plane on the evaluation
board.
7
DOUT
Serial Data Output. This is a buffered version of
the signal on the AD7714's DOUT pin.
8DV
DD
Digital Supply Voltage. If no DV
DD voltage is
applied to the board's DV
DD input terminal,
then the voltage applied to this pin of the con-
nector will supply the DV
DD for the evaluation
board.
9
SYNC
Logic Input. The signal on this pin is buffered
before being applied to the SYNC pin of the
AD7714.
NOTE
1An explanation of the AD7714 functions mentioned here is given in Table III as
part of the SKT11 pin designations description.


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