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U630H16SC25 Datasheet(PDF) 1 Page - Simtek Corporation |
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U630H16SC25 Datasheet(HTML) 1 Page - Simtek Corporation |
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1 / 15 page  Obsolete - Not Recommended for New Designs U630H16 1 March 31, 2006 STK Control #ML0036 Rev 1.0 • High-performance CMOS nonvo- latile static RAM 2048 x 8 bits • 25, 35 and 45 ns Access Times • 12, 20 and 25 ns Output Enable Access Times • Hardware STORE Initiation (STORE Cycle Time < 10 ms) • Automatic STORE Timing • 106 STORE cycles to EEPROM • 100 years data retention in EEPROM • Automatic RECALL on Power Up • Hardware RECALL Initiation (RECALL Cycle Time < 20 ms) • Unlimited RECALL cycles from EEPROM • Unlimited Read and Write to SRAM • Single 5 V ± 10 % Operation • Operating temperature ranges: 0to70 ×C -40to85 ×C -40to125 °C(only 35 ns) • QS 9000 Quality Standard • ESD protection > 2000 V (MIL STD 883C M3015.7-HBM) • RoHS compliance and Pb- free • Packages:SOP28 (300 mil), PDIP28 (300/600 mil) The U630H16 has two separate modes of operation: SRAM mode and nonvolatile mode, determined by the state of the NE pin. In SRAM mode, the memory ope- rates as an ordinary static RAM. In nonvolatile operation, data is trans- ferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disabled. The U630H16 is a fast static RAM (25, 35, 45 ns), with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM can be read and written an unlimited number of times, while independent nonvolatile data resi- des in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation), or from the EEPROM to the SRAM (the RECALL operation) are initiated through the state of the NE pin. The U630H16 combines the high performance and ease of use of a fast SRAM with nonvolatile data integrity. Once a STORE cycle is initiated, further input or output are disabled until the cycle is completed. Internally, RECALL is a two step procedure. First, the SRAM data is cleared and second, the nonvola- tile information is transferred into the SRAM cells. The RECALL operation in no way alters the data in the EEPROM cells. The nonvolatile data can be recalled an unlimited number of times. HardStore 2K x 8 nvSRAM Pin Configuration Pin Description Top View 1 NE VCC 28 2 n.c. W 27 4 A6 A8 25 5 A5 A9 24 3 A7 n.c. 26 6 A4 n.c. 23 7 A3 G 22 8 A2 A10 21 12 DQ1 DQ5 17 9 A1 E 20 10 A0 DQ7 19 11 DQ0 DQ6 18 13 DQ2 DQ4 16 14 VSS DQ3 15 PDIP SOP Signal Name Signal Description A0 - A10 Address Inputs DQ0 - DQ7 Data In/Out E Chip Enable G Output Enable W Write Enable NE Nonvolatile Enable VCC Power Supply Voltage VSS Ground Features Description |
Similar Part No. - U630H16SC25 |
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