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U631H16D1K45 Datasheet(PDF) 1 Page - Simtek Corporation |
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U631H16D1K45 Datasheet(HTML) 1 Page - Simtek Corporation |
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1 / 13 page  U631H16 Obsolete - Not Recommended for New Designs 1 March 31, 2006 STK Control #ML0042 Rev 1.0 SimtekSoftStore 2K x 8 nvSRAM The U631H16 has two separate modes of operation: SRAM mode and nonvolatile mode. In SRAM mode, the memory operates as an ordinary static RAM. In nonvolatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disab- led. The U631H16 is a fast static RAM (25, 35, 45 ns), with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM can be read and written an unlimited number of times, while independent nonvolatile data resi- des in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE opera- tion), or from the EEPROM to the SRAM (the RECALL ) operation) are initiated through software sequences. The U631H16 combines the high performance and ease of use of a fast SRAM with nonvolatile data integrity. Once a STORE cycle is initiated, further input or output are disabled until the cycle is completed. Because a sequence of addresses is used for STORE initiation, it is important that no other read or write accesses intervene in the sequence or the sequence will be aborted. Internally, RECALL is a two step procedure. First, the SRAM data is cleared and second, the nonvola- tile information is transferred into the SRAM cells. The RECALL operation in no way alters the data in the EEPROM cells. The nonvolatile data can be recalled an unlimited number of times. • High-performance CMOS nonvola- tile static RAM 2048 x 8 bits • 25, 35 and 45 ns Access Times • 12, 20 and 25 ns Output Enable Access Times • Software STORE Initiation (STORE Cycle Time < 10 ms) • Automatic STORE Timing • 106 STORE cycles to EEPROM • 100 years data retention in EEPROM • Automatic RECALL on Power Up • Software RECALL Initiation (RECALL Cycle Time < 20 μs) • Unlimited RECALL cycles from EEPROM • Unlimited Read and Write to SRAM • Single 5 V ± 10 % Operation • Operating temperature ranges: 0 to 70 °C -40 to 85 °C • QS 9000 Quality Standard • ESD protection > 2000 V (MIL STD 883C M3015.7-HBM) • RoHS compliance and Pb- free • Packages: PDIP28 (600 mil) SOP24 (300 mil) Pin Configuration Pin Description Top View 1 n.c. VCC 28 2 n.c. W 27 4 A6 A8 25 5 A5 A9 24 3 A7 n.c. 26 6 A4 n.c. 23 7 A3 G 22 8 A2 A10 21 12 DQ1 DQ5 17 9 A1 E 20 10 A0 DQ7 19 11 DQ0 DQ6 18 13 DQ2 DQ4 16 14 VSS DQ3 15 PDIP Signal Name Signal Description A0 - A10 Address Inputs DQ0 - DQ7 Data In/Out E Chip Enable G Output Enable W Write Enable VCC Power Supply Voltage VSS Ground Top View 2 A6 A8 23 3 A5 A9 22 1 A7 VCC 24 4 A4 W 21 5 A3 G 20 6 A2 A10 19 10 DQ1 DQ5 15 7 A1 E 18 8 A0 DQ7 17 9 DQ0 DQ6 16 11 DQ2 DQ4 14 12 VSS DQ3 13 SOP 24 Features Description 28 |
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