U631H16

7

March 31, 2006

STK Control #ML0042

Rev 1.0

Nonvolatile Memory Operations

k:

No.

STORE Cycle Inhibit and

Automatic Power Up RECALL

Symbol

Min.

Max.

Unit

Alt.

IEC

650

μs

Low Voltage Trigger Level

4.0

4.5

V

STORE Cycle Inhibit and Automatic Power Up RECALL

(24)

5.0 V

STORE inhibit

Power Up

RECALL

t

Software Mode Selection

E

W

A10 - A0

(hex)

Mode

I/O

Power

Notes

LH

000

555

2AA

7FF

0F0

70F

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile STORE

Output Data

Output Data

Output Data

Output Data

Output Data

Output High Z

Active

l, m

l, m

l, m

l, m

l, m

l

LH

000

555

2AA

7FF

0F0

70E

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile RECALL

Output Data

Output Data

Output Data

Output Data

Output Data

Output High Z

Active

l, m

l, m

l, m

l, m

l, m

l

l:

The six consecutive addresses must be in order listed (000, 555, 2AA, 7FF, 0F0, 70F) for a Store cycle or (000, 555, 2AA,

7FF, 0F0, 70E) for a RECALL cycle. W must be high during all six consecutive cycles. See STORE cycle and RECALL cycle tables and

diagrams for further details.

The following six-address sequence is used for testing purposes and should not be used: 000, 555, 2AA, 7FF, 0F0, 39C.

m: I/O state assumes that G

≤ V