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STK14C88 Datasheet(PDF) 11 Page - Simtek Corporation

Part # STK14C88
Description  32Kx8 AutoStore nvSRAM
Download  19 Pages
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Manufacturer  SIMTEK [Simtek Corporation]
Direct Link  http://www.simtek.com
Logo SIMTEK - Simtek Corporation

STK14C88 Datasheet(HTML) 11 Page - Simtek Corporation

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February 2007
Document Control #ML0014 Rev 0.3
The STK14C88 provides the HSB pin for controlling
and acknowledging the STORE operations. The HSB
pin can be used to request a hardware STORE cycle.
When the HSB pin is driven low, the STK14C88 will
conditionally initiate a STORE operation after t
an actual STORE cycle will only begin if a WRITE to
the SRAM took place since the last STORE or
cycle. The HSB pin also acts as an open
drain driver that is internally driven low to indicate a
busy condition while the STORE (initiated by any
means) is in progress. Pull up this pin with an exter-
nal 10K ohm resistor to VCAP if HSB is used as a
and WRITE operations that are in
progress when HSB is driven low by any means are
given time to complete before the STORE operation
is initiated. After HSB goes low, the STK14C88 will
continue SRAM operations for t
During t
multiple SRAM READ operations may take place. If a
is in progress when HSB is pulled low it will
be allowed a time, t
DELAY, to complete. However, any
cycles requested after HSB goes low
will be inhibited until HSB returns high.
The HSB pin can be used to synchronize multiple
STK14C88s while using a single larger capacitor. To
operate in this mode the HSB pin should be con-
nected together to the HSB pins from the other
STK14C88s. An external pull-up resistor to + 5V is
required since HSB acts as an open drain pull down.
The V
CAP pins from the other STK14C88 parts can
be tied together and share a single capacitor. The
capacitor size must be scaled by the number of
devices connected to it. When any one of the
STK14C88s detects a power loss and asserts HSB,
the common HSB pin will cause all parts to request
a STORE cycle (a STORE will take place in those
STK14C88s that have been written since the last
nonvolatile cycle).
During any STORE operation, regardless of how it
was initiated, the STK14C88 will continue to drive
the HSB pin low, releasing it only when the STORE is
complete. Upon completion of the STORE operation
the STK14C88 will remain disabled until the HSB
pin returns high.
If HSB is not used, it should be left unconnected.
The STORE function can be disabled on the fly by
holding HSB high with a driver capable of sourcing
30mA at a V
OH of at least 2.2V, as it will have to
overpower the internal pull-down device that drives
HSB low for 20
μs at the onset of a STORE. When
the STK14C88 is connected for AutoStore operation
(system V
CC connected to VCCX and a 68
μF capacitor
on V
CAP) and VCC crosses VSWITCH on the way down,
the STK14C88 will attempt to pull HSB low; if HSB
doesn’t actually get below V
IL, the part will stop try-
ing to pull HSB low and abort the STORE attempt.
The STK14C88 offers hardware protection against
inadvertent STORE operation and SRAM WRITEs dur-
ing low-voltage conditions. When V
externally initiated STORE operations and SRAM
s will be inhibited.
AutoStore can be completely disabled by tying V
to ground and applying + 5V to V
CAP. This is the
AutoStore Inhibit mode; in this mode STOREs are only
initiated by explicit request using either the software
sequence or the HSB pin.
The STK14C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 5
shows the relationship between I
CC and READ cycle
time. Worst-case current consumption is shown for
both CMOS and TTL input levels (commercial tem-
perature range, V
CC = 5.5V, 100% duty cycle on chip
enable). Figure 6 shows the same relationship for
cycles. If the chip enable duty cycle is less
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK14C88 depends on the following items:
1) CMOS vs. TTL input levels; 2) the duty cycle of
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of READs to WRITEs; 5) the operating
temperature; 6) the Vcc level; and 7) I/O loading.

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