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25AA512 Datasheet(PDF) 6 Page - Microchip Technology

Part No. 25AA512
Description  512 Kbit SPI Bus Serial EEPROM
Download  32 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

25AA512 Datasheet(HTML) 6 Page - Microchip Technology

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25AA512/25LC512
DS22021B-page 6
Preliminary
© 2007 Microchip Technology Inc.
2.0
FUNCTIONAL DESCRIPTION
2.1
Principles of Operation
The 25XX512 is a 65,536 byte Serial EEPROM
designed to interface directly with the Serial Periph-
eral Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s PIC®
microcontrollers. It may also interface with microcon-
trollers that do not have a built-in SPI port by using
discrete I/O lines programmed properly in firmware to
match the SPI protocol.
The 25XX512 contains an 8-bit instruction register. The
device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low and the HOLD pin must be high for the entire
operation.
Table 2-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSB first, LSB
last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD input and place the 25XX512 in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
BLOCK DIAGRAM
TABLE 2-1:
INSTRUCTION SET
SI
SO
SCK
CS
HOLD
WP
STATUS
Register
I/O Control
Memory
Control
Logic
X
Dec
HV Generator
EEPROM
Array
Page Latches
Y Decoder
Sense Amp.
R/W Control
Logic
VCC
VSS
Instruction Name
Instruction Format
Description
READ
0000 0011
Read data from memory array beginning at selected address
WRITE
0000 0010
Write data to memory array beginning at selected address
WREN
0000 0110
Set the write enable latch (enable write operations)
WRDI
0000 0100
Reset the write enable latch (disable write operations)
RDSR
0000 0101
Read STATUS register
WRSR
0000 0001
Write STATUS register
PE
0100 0010
Page Erase – erase one page in memory array
SE
1101 1000
Sector Erase – erase one sector in memory array
CE
1100 0111
Chip Erase – erase all sectors in memory array
RDID
1010 1011
Release from Deep power-down and read electronic signature
DPD
1011 1001
Deep Power-Down mode


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