 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MCP23S17T-E/SP Datasheet(PDF) 24 Page - Microchip Technology |
|
||||||||||||||||||||||||||||||
MCP23S17T-E/SP Datasheet(HTML) 24 Page - Microchip Technology |
|
|
24 / 48 page  MCP23017/MCP23S17 DS21952B-page 24 © 2007 Microchip Technology Inc. 1.7 Interrupt Logic If enabled, the MCP23X17 activates the INTn interrupt output when one of the port pins changes state or when a pin does not match the preconfigured default. Each pin is individually configurable as follows: • Enable/disable interrupt via GPINTEN • Can interrupt on either pin change or change from default as configured in DEFVAL Both conditions are referred to as Interrupt-on-Change (IOC). The interrupt control module uses the following registers/bits: • IOCON.MIRROR – controls if the two interrupt pins mirror each other • GPINTEN – Interrupt enable register • INTCON – Controls the source for the IOC • DEFVAL – Contains the register default for IOC operation 1.7.1 INTA AND INTB There are two interrupt pins: INTA and INTB. By default, INTA is associated with GPAn pins (PortA) and INTB is associated with GPBn pins (PortB). Each port has an independent signal which is cleared if its associated GPIO or INTCAP register is read. 1.7.1.1 Mirroring the INT pins Additionally, the INTn pins can be configured to mirror each other so that any interrupt will cause both pins to go active. This is controlled via IOCON.MIRROR. If IOCON.MIRROR = 0, the internal signals are routed independently to the INTA and INTB pads. If IOCON.MIRROR = 1, the internal signals are OR’ed together and routed to the INTn pads. In this case, the interrupt will only be cleared if the associated GPIO or INTCAP is read (see Table 1-7). TABLE 1-7: INTERRUPT OPERATION (IOCON.MIRROR = 1) 1.7.2 IOC FROM PIN CHANGE If enabled, the MCP23X17 will generate an interrupt if a mismatch condition exists between the current port value and the previous port value. Only IOC enabled pins will be compared. Refer to Register 1-3 and Register 1-5. 1.7.3 IOC FROM REGISTER DEFAULT If enabled, the MCP23X17 will generate an interrupt if a mismatch occurs between the DEFVAL register and the port. Only IOC enabled pins will be compared. Refer to Register 1-3, Register 1-5 and Register 1-4. 1.7.4 INTERRUPT OPERATION The INTn interrupt output can be configured as active- low, active-high or open-drain via the IOCON register. Only those pins that are configured as an input (IODIR register) with Interrupt-On-Change (IOC) enabled (IOINTEN register) can cause an interrupt. Pins defined as an output have no effect on the interrupt output pin. Input change activity on a port input pin that is enabled for IOC will generate an internal device interrupt and the device will capture the value of the port and copy it into INTCAP. The interrupt will remain active until the INTCAP or GPIO register is read. Writing to these registers will not affect the interrupt. The interrupt condition will be cleared after the LSb of the data is clocked out during a read command of GPIO or INTCAP. The first interrupt event will cause the port contents to be copied into the INTCAP register. Subsequent interrupt conditions on the port will not cause an interrupt to occur as long as the interrupt is not cleared by a read of INTCAP or GPIO. Interrupt Condition Read Portn * Interupt Result GPIOA PortA Clear PortB Unchanged GPIOB PortA Unchanged PortB Clear GPIOA and GPIOB PortA Unchanged PortB Unchanged Both PortA and PortB Clear * Port n = GPIOn or INTCAPn Note: The value in INTCAP can be lost if GPIO is read before INTCAP while another IOC is pending. After reading GPIO, the interrupt will clear and then set due to the pending IOC, causing the INTCAP register to update. |
Similar Part No. - MCP23S17T-E/SP |
|
Similar Description - MCP23S17T-E/SP |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
