Si570/Si571

10

Rev. 0.3

Table 8. Typical CLK± Output Phase Noise (Si570)

Offset Frequency (f)

120.00 MHz

LVDS

156.25 MHz

LVPECL

622.08 MHz

LVPECL

Units

100 Hz

1kHz

10 kHz

100 kHz

1MHz

10 MHz

100 MHz

–112

–122

–132

–137

–144

–150

n/a

–105

–122

–128

–135

–144

–147

n/a

–97

–107

–116

–121

–134

–146

–148

dBc/Hz

Table 9. Typical CLK± Output Phase Noise (Si571)

Offset Frequency

74.25 MHz

90 ppm/V

LVPECL

491.52 MHz

45 ppm/V

LVPECL

622.08 MHz

135 ppm/V

LVPECL

Units

100 Hz

1kHz

10 kHz

100 kHz

1MHz

10 MHz

100 MHz

–87

–114

–132

–142

–148

–150

n/a

–75

–100

–116

–124

–135

–146

–147

–65

–90

–109

–121

–134

–146

–147

dBc/Hz

Table 10. Absolute Maximum Ratings

Parameter

Symbol

Rating

Units

Supply Voltage

–0.5 to +3.8

Volts

Input Voltage

Volts

Storage Temperature

–55 to +125

ºC

ESD Sensitivity (HBM, per JESD22-A114)

ESD

>2500

Volts

Soldering Temperature (lead-free profile)

260

ºC

20–40

seconds

Notes:

1. Stresses beyond the absolute maximum ratings may cause permanent damage to the device. Functional operation or

specification compliance is not implied at these conditions.

2. The device is compliant with JEDEC J-STD-020C. Refer to Si5xx Packaging FAQ available for download at