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ST7LITE49M Datasheet(PDF) 46 Page - STMicroelectronics |
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ST7LITE49M Datasheet(HTML) 46 Page - STMicroelectronics |
46 / 188 page Supply, reset and clock management ST7LITE49M 46/188 7.5.3 AVD Threshold Selection register (AVDTHCR) Reset value: 0000 0000 (00h) Bits 7:5 = CK[2:0] internal RC Prescaler Selection These bits are set by software and cleared by hardware after a reset. These bits select the prescaler of the internal RC oscillator. See Figure 13 on page 36 and Table 10. If the internal RC is used with a supply operating range below 3.3V, a division ratio of at least 2 must be enabled in the RC prescaler. Bits 4:2 = Reserved, must be kept cleared. Bits 1:0 = AVD[1:0] AVD Threshold selection. These bits are used to select the AVD threshold. They are set and cleared by software. They are set by hardware after a reset. Bit 1 = AVDF Voltage Detector flag This read-only bit is set and cleared by hardware. If the AVDIE bit is set, an interrupt request is generated when the AVDF bit is set. Refer to Figure 19 for additional details 0: VDD over AVD threshold 1: VDD under AVD threshold Bit 0 = AVDIE Voltage Detector interrupt enable bit This bit is set and cleared by software. It enables an interrupt to be generated when the AVDF flag is set. The pending interrupt information is automatically cleared when software enters the AVD interrupt routine. 0: AVD interrupt disabled 1: AVD interrupt enabled 7 0 CK2 CK1 CK0 0 0 0 AVD1 AVD0 Read/write Table 10. Internal RC Prescaler Selection bits CK2 CK1 CK0 fOSC 00 1 fRC/2 01 0 fRC/4 01 1 fRC/8 10 0 fRC/16 others fRC |
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