November 1993

11

Philips Semiconductors

Product specification

Control circuit for switched mode power supplies

TDA8380A

Slow-start circuit

A slow-start occurs:

• At Switch-on of the SMPS

• After a current trip as described in the section Over-current protection

The capacitor at the SS input is discharged and the slow-start bistable is reset when the voltage at the SS input falls

below 0.5 V after which the circuit is ready for a slow-start. The dead time (during which the capacitor at the SS input is

being charged to the 1.4 V lower level of the sawtooth) before duty cycle regulation starts is minimal. The SS input can

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Output stages

The output stage consists of two NPN darlington transistors, their collector and emitter connected to separate pins (see

Fig.13). The top transistor is capable of sourcing a maximum of 0.75 A to the high-voltage transistor while the bottom

transistor can sink peak currents up to 2.5 A.

For low currents up to 10 mA, the saturation voltage of the sink darlington transistor is similar to that of a single transistor

(see Fig.11). During switching of this transistor dV/dt is internally limited to reduce interference.

Care should be taken with the external wiring of the output pins to avoid oscillation or interference due to parasitic

inductance and wire resistance.

Fig.10 Current protection.