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24AA64T-I/SN Datasheet(PDF) 9 Page - Microchip Technology |
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24AA64T-I/SN Datasheet(HTML) 9 Page - Microchip Technology |
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9 / 28 page  © 2007 Microchip Technology Inc. DS21189L-page 9 24AA64/24LC64/24FC64 5.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally-timed write cycle and ACK polling can then be initiated immediately. This involves the master sending a Start condition followed by the control byte for a Write command (R/W = 0). If the device is still busy with the write cycle, then no ACK will be returned. If no ACK is returned, the Start bit and control byte must be re-sent. If the cycle is complete, the device will return the ACK and the master can then proceed with the next Read or Write command. See Figure 5-1 for a flow diagram of this operation. FIGURE 5-1: ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R/W = 0 Did Device Acknowledge (ACK = 0)? Next Operation No Yes |
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