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TDA8046 Datasheet(PDF) 30 Page - NXP Semiconductors |
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TDA8046 Datasheet(HTML) 30 Page - NXP Semiconductors |
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30 / 48 page  1996 Nov 19 30 Philips Semiconductors Product specification Multi-mode QAM demodulator TDA8046 7.1.11 I2C-BUS INTERFACE The TDA8046 is controlled by an I2C-bus. For programming, there is one module address (7 bits) and the R/W bit for selecting READ or WRITE mode. It should be noted that the TDA8046 starts up in accordance with to the settings defined in Tables 7, 8 and 9. Table 6 Slave address Table 7 WRITE (R/W=0) A6 A5 A4 A3 A2 A1 A0 R/W 000111 A0 X FUNCTION ADD D7 D6 D5 D4 D3 D2 D1 D0 DAC current inversion/general 00 AGCI CLKI CARI OUTE DEM NYQ DPHR RST Demodulator 01 INP RLF OUTB OUTA INVD CONC CONB CONA DAC/OFFS/switch 02 ANAS OFFS AGCB AGCA CLKB CLKA CARB CARA Digital test/output formatter 03 −− − − OUTF TSEL2 TSEL1 TSEL0 Digital loop filter B.W. 04 DCA7 DCA6 DCA5 DCA4 DCA3 DCA2 DCA1 DCA0 Digital loop filter B.W. 05 FSOL −− −− DCB2 DCB1 DCB0 Lock detector threshold 06 LDT7 LDT6 LDT5 LDT4 LDT3 LDT2 LDT1 LDT0 Lock detector window size 07 −− − − − − WS1 WS0 AGC detector threshold 08 ATH7 ATH6 ATH5 ATH4 ATH3 ATH2 ATH1 ATH0 Equalizer mode 09 −− EAR FFEL EDFE EFFE EFC PRESET Equalizer tap FFEI 0A FFEI07 FFEI06 FFEI05 FFEI04 FFEI03 FFEI02 FFEI01 FFEI00 Equalizer steps 0B − FSTP2 FSTP1 FSTP0 − DSTP2 DSTP1 DSTP0 |
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