 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TDA8004AT Datasheet(PDF) 6 Page - NXP Semiconductors |
|
||||||||||||||||||||||||||||||
TDA8004AT Datasheet(HTML) 6 Page - NXP Semiconductors |
|
|
6 / 22 page  2004 May 10 6 Philips Semiconductors Product specification IC card interface TDA8004AT FUNCTIONAL DESCRIPTION Throughout this document, it is assumed that the reader is familiar with ISO7816 norm terminology. Power supply The supply pins for the IC are VDD and GND. VDD should be in the range from 2.7 to 6.5 V. All interface signals with the microcontroller are referenced to VDD; therefore be sure the supply voltage of the microcontroller is also at VDD. All card contacts remain inactive during powering up or powering down. The sequencer is not activated until VDD reaches Vth2 +Vhys(th2) (see Fig.3). When VDD falls below Vth2, an automatic deactivation of the contacts is performed. For generating a 5 V ±5% VCC supply to the card, an integrated voltage doubler is incorporated. This step-up converter should be separately supplied by VDDP and PGND (from 4.5 to 6.5 V). Due to large transient currents, the 2 × 100 nF capacitors of the step-up converter should have an ESR of less than 100 m Ω, and be located as near as possible to the IC. The supply voltages VDD and VDDP may be applied to the IC in any time sequence. If a voltage between 7 and 9 V is available within the application, this voltage may be tied to pin VUP, thus blocking the step-up converter. In this case, VDDP must be tied to VDD and the capacitor between pins S1 and S2 may be omitted. Voltage supervisor This block surveys the VDD supply. A defined reset pulse of approximately 10 ms (tW) is used internally for maintaining the IC in the inactive mode during powering up or powering down of VDD (see Fig.3)). As long as VDD is less than Vth2 +Vhys(th2), the IC will remain inactive whatever the levels on the command lines. This also lasts for the duration of tW after VDD has reached a level higher than Vth2 +Vhys(th2). The system controller should not attempt to start an activation sequence during this time. When VDD falls below Vth2, a deactivation sequence of the contacts is performed. CLKDIV1 CLKDIV2 5V/3V PGND S2 VDDP S1 VUP PRES PRES I/O AUX2 AUX1 CGND AUX2UC AUX1UC I/OUC XTAL2 OFF GND XTAL1 VDD RSTIN CMDVCC n.c. VCC RST CLK 1 2 3 4 5 6 7 8 9 10 11 12 13 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 TDA8004AT FCE659 Fig.2 Pin configuration. |
Similar Part No. - TDA8004AT |
|
Similar Description - TDA8004AT |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
