Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

APVV Datasheet(PDF) 1 Page - Abracon Corporation

Part No. APVV
Description  CERAMIC SMD VOLTAGE CONTROL CRYSTAL OSCILLATOR
Download  2 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  ABRACON [Abracon Corporation]
Homepage  http://www.abracon.com/index.htm
Logo 

APVV Datasheet(HTML) 1 Page - Abracon Corporation

   
Zoom Inzoom in Zoom Outzoom out
 1 / 2 page
background image
Frequency Range
Operating Temperature
Storage Temperature
Frequency Pull Range
Pull Range Linearity
Overall Frequency Stability
Supply Voltage (Vdd)
Phase Jitter RMS (12KHz-20MHz)
Period Jitter (peak to peak)
ABRACON IS
ABRACON IS
ISO 9001 / QS 9000
ISO 9001 / QS 9000
CERTIFIED
CERTIFIED
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
30332 Esperanza, Rancho Santa Margarita, California 92688
tel 949-546-8000 | fax 949-546-8001 | www.abracon.com
CERAMIC SMD VOLTAGE CONTROL CRYSTAL OSCILLATOR
CERAMIC SMD VOLTAGE CONTROL CRYSTAL OSCILLATOR
CERAMIC SMD VOLTAGE CONTROL CRYSTAL OSCILLATOR
|||||||||||||||
APVV SERIES
STANDARD SPECIFICATIONS: PARAMETERS
PECL
38 MHz to 640 MHz
0°C to + 70°C (see options)
-55°C to +125°C
± 50 ppm (see options)
10% Max
± 50 ppm max. (see options)
2.25V to 3.63 (2.5V to 3.3V ± 10%)
0.5pS Typ, 1pS Max
20pS typ., 30pS max up to 320 MHz; 50pS typ., 70pS max 321MHz to 640MHz
Tri-State Function
For CMOS and LVDS = "1" (VIH ³ 0.7* Vdd) or open: Oscillation;
"0" (VIL < 0.3* Vdd): No oscillation/Hi Z
For PECL (See TriState Pin Operation table) = P Option (Standard PECL OE)
"0" (VIL < 0.3* Vdd): or Open: Oscillation; "1" (VIH ³ 0.7* Vdd): No oscillation/Hi Z
P1 Option = "1" (VIH ³ 0.7* Vdd) or open: Oscillation;
"0" (VIL < 0.3* Vdd): No oscillation/Hi Z
5.0 x 7.0 x 1.8mm
Supply Current (IDD)
Symmetry (Duty Cycle)
Output Logic High
Output Logic Low
Rise time
Fall time
45% min, 50% typical, 55% max.
VDD -1.025V min, VDD -0.880V max.
VDD -1.810V min, VDD -1.620V max.
1.5ns max, 0.6nSec typical
1.5ns max, 0.6nSec typical
LVDS
Supply Current (IDD)
Output Clock Duty Cycle @ 1.25V
Output Differential Voltage (VOD)
VDD Magnitude Change (
∆VOD)
Output High Voltage
Output Low Voltage
Offset Voltage [RL = 100
Ω]
Offset Magnitude Voltage[RL = 100
Ω]
Power-off Leakage (IOXD) [Vout=VDD or GND, VDD=0V]
Differential Clock Rise Time (tr) [RL=100
Ω, CL=10pF]
Differential Clock Fall Time (tf) [RL=100
Ω, CL=10pF]
CMOS
Supply Current
Symmetry (Duty Cycle)
Rise/ Fall Time
30mA max (38MHz<Fo<320MHz)
45% min, 50% typ, 55% max,
45% min, 50% typical, 55% max
247mV min, 355mV typical, 454mV max
-50mV min, 50mV max
VOH = 1.6V max, 1.4V typical
VOL = 0.9V min, 1.1V typical
VOS = 1.125V min, 1.2V typical, 1.375V max
∆VOS = 0mV min, 3mV typical, 25mV max
±10
µA max, ±1µA typical
0.7ns typical, 1.0ns max
0.7ns typical, 1.0ns max
: PRELIMINARY
45mA max(for 38MHz<Fo<320MHz), 70mA max (320MHz<Fo<640MHz)
65mA max (for 38MHz<Fo<320MHz), 90mA max (320MHz<Fo<640MHz)
(0.3V ~ 3.0V w/15 pF load) 0.7nS Typ.; (20%-80% w/50Ω Load) 0.3nS Typ.
APPLICATIONS:
• SONET, Fiber Channel, SERDES
HDTV, OBSAI, CPRI, PCI Express, 1394
FEATURES:
• CMOS, PECL or LVDS Output
• Low Power ( 2.5, 3.3V )
• Wide Pull Range
• Sub 1pS ( 12kHz - 20MHz )
• Low Jitter


Html Pages

1  2 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn