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TDA4857PS Datasheet(PDF) 4 Page - NXP Semiconductors

Part No. TDA4857PS
Description  I2C-bus autosync deflection controller for PC monitors
Download  56 Pages
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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TDA4857PS Datasheet(HTML) 4 Page - NXP Semiconductors

 
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VERTICAL
SYNC INPUT
AND POLARITY
CORRECTION
VERTICAL
SYNC
INTEGRATOR
VERTICAL
OSCILLATOR
AND AGC
EW-OUTPUT
HORIZONTAL PINCUSHION
HORIZONTAL CORNER
HORIZONTAL TRAPEZIUM
HORIZONTAL SIZE
VERTICAL LINEARITY
VERTICAL LINEARITY
BALANCE
HORIZONTAL SIZE
AND
VERTICAL SIZE
EHT COMPENSATION
OUTPUT
ASYMMETRIC
EW-CORRECTION
I2C-BUS
RECEIVER
HUNLOCK
OUTPUT
VERTICAL POSITION
VERTICAL SIZE, VOVSCN
VIDEO CLAMPING
AND
VERTICAL BLANK
SUPPLY
AND
REFERENCE
HORIZONTAL
OSCILLATOR
PLL1 AND
HORIZONTAL
POSITION
PLL2, PARALLELOGRAM,
PIN UNBALANCE AND
SOFT START
COINCIDENCE DETECTOR
FREQUENCY DETECTOR
I2C-BUS REGISTERS
PROTECTION
AND SOFT START
X-RAY
PROTECTION
HORIZONTAL
OUTPUT
STAGE
B
+
CONTROL
22
k
3.3 k
100 nF
8.2
nF
150
nF
(1%)
X-RAY
10 nF
RHBUF
(2%)
RHREF
(1%)
(1)
B
+ CONTROL
APPLICATION
(2)
(TTL level)
(TTL level)
MHB658
9.2 to 16 V
(video)
clamping
blanking
14
23
22
21
31
11
100
nF
(5%)
24
VOUT2
12
VOUT1
ASCOR
13
32
FOCUS
BDRV
BSENS
BOP
BIN
8 HDRV
or
20
17
19
18
6
4
3
5
10
7
25
16
15
26
27
28
29
8.2 nF
30
1
TDA4857PS
H/C SYNC INPUT
AND POLARITY
CORRECTION
2
9
VERTICAL OUTPUT
FOCUS
VERTICAL
SDA
SCL
HSYNC
SGND
PGND
CLBL
VSYNC
VCC
EWDRV
VSMOD
VAGC
VCAP
VREF
HSMOD
7 V
1.2 V
EHT compensation
via horizontal size
EHT compensation
via vertical size
HFLB
HPLL2
HCAP
HREF
HBUF
HPLL1
XSEL
XRAY
HUNLOCK
Fig.1 Block diagram and application circuit.
(1) For the calculation of fH range see Section “Calculation of line frequency range”.
(2) See Figs 21 and 22.


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