Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF HTML

PIC18F2420 Datasheet(PDF) 1 Page - Microchip Technology

Part No. PIC18F2420
Description  28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Download  16 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
Logo 

PIC18F2420 Datasheet(HTML) 1 Page - Microchip Technology

 
Zoom Inzoom in Zoom Outzoom out
 1 / 16 page
background image
© 2005 Microchip Technology Inc.
DS80209D-page 1
PIC18F2420/2520/4420/4520
The PIC18F2420/2520/4420/4520 Rev. A1 parts you
have received conform functionally to the Device Data
Sheet (DS39631), except for the anomalies described
below. Any Data Sheet Clarification issues related to
the PIC18F2420/2520/4420/4520 will be reported in a
separate Data Sheet errata. Please check the
Microchip web site for any existing issues.
All the problems listed here will be addressed in future
revisions of the PIC18F2420/2520/4420/4520 silicon.
The
following
silicon
errata
apply
only
to
PIC18F2420/2520/4420/4520 devices with these
Device/Revision IDs:
1.
Module: MSSP
In its current implementation, the I2C™ Master
mode operates as follows:
a) The Baud Rate Generator for I2C in Master
mode is slower than the rates specified in
Table 17-3 of the Device Data Sheet.
For this revision of silicon, use the values
shown in Table 1 in place of those shown in
Table 17-3 of the Device Data Sheet. The
differences are shown in bold text.
b) Use the following formula in place of the one
shown in Register 17-4 (SSPCON1) of the
Device
Data
Sheet
for
bit
description
SSPM3:SSPM0 = 1000.
SSPADD = INT((FCY/FSCL) – (FCY/1.111 MHz)) – 1
Date Codes that pertain to this issue:
All engineering and production devices.
TABLE 1:
I2C™ CLOCK RATE w/BRG
Part Number
Device ID
Revision ID
PIC18F2420
01 0001 010
00001
PIC18F2520
01 0001 000
00001
PIC18F4420
01 0000 110
00001
PIC18F4520
01 0000 100
00001
The Device IDs (DEVID1 and DEVID2) are located at
addresses
3FFFFEh:3FFFFFh
in
the
device’s
configuration space. They are shown in hexadecimal
in the format “DEVID2 DEVID1”.
FOSC
FCY
FCY * 2
BRG Value
FSCL
(2 Rollovers of BRG)
40 MHz
10 MHz
20 MHz
0Eh
400 kHz(1)
40 MHz
10 MHz
20 MHz
15h
312.5 kHz
40 MHz
10 MHz
20 MHz
59h
100 kHz
16 MHz
4 MHz
8 MHz
05h
400 kHz(1)
16 MHz
4 MHz
8 MHz
08h
308 kHz
16 MHz
4 MHz
8 MHz
23h
100 kHz
4 MHz
1 MHz
2 MHz
01h
333 kHz(1)
4 MHz
1 MHz
2 MHz
08h
100 kHz
4 MHz
1 MHz
2 MHz
00h
1 MHz(1)
Note 1:
The I2C™ interface does not conform to the 400 kHz I2C specification (which applies to rates greater than
100 kHz) in all details, but may be used with care where higher rates are required by the application.
PIC18F2420/2520/4420/4520 Rev. A1 Silicon Errata Sheet


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn