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SN751508 Datasheet(PDF) 1 Page - STMicroelectronics

Part No. SN751508
Description  DC PLASMA DISPLAY DRIVERS
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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SN751508 Datasheet(HTML) 1 Page - STMicroelectronics

 
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SN751508, SN751518
DC PLASMA DISPLAY DRIVERS
SLDS035 – JANUARY 1987 – REVISED NOVEMBER 1989
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Each Device Drives 32 Lines
D –120-V PNP Open-Collector Parallel
Outputs
D High-Speed Serially Shifted Data Inputs
D CMOS-Compatible Inputs
D Strobe and Sustain Inputs Provided
D Serial Data Output for Cascade Operation
description
The SN751508 and SN751518 are monolithic
integrated circuits designed to drive the data lines
of a dc plasma panel display. The SN751518 pin
sequence is reversed from the SN751508 for
ease in printed-circuit-board layout.
Each device consists of two 16-bit shift registers,
32 latches, 32 OR gates, and 32 pnp open-
collector output AND gates. Typically, a 32-bit
data string is split into two 16-bit data strings
externally and then entered in parallel into the shift
registers on the high-to-low transition of the clock
signal. A high LATCH ENABLE transfers the data
from the shift registers to the inputs of 32 OR gates
through the latches. Data present in the latch
during the high-to-low transition of LATCH
ENABLE is stored. When STROBE is high, the
latch is masked and a high is placed on the data
input of the output AND gates. When STROBE is
low and SUSTAIN is high, data from the latches is
reflected at the outputs. When low, SUSTAIN
forces all outputs to their off state. Drivers can be
cascaded via the serial data outputs of the static
shift registers. These outputs are not affected by
LATCH ENABLE, STROBE, or SUSTAIN.
The
SN751508
and
the
SN751518
are
characterized from 0
°C to 70°C.
Copyright
© 1989, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Q32
Q31
Q30
Q29
Q28
Q27
Q26
Q25
Q24
Q23
Q22
Q21
Q20
Q19
Q18
Q17
GND
NC
STROBE
NC
CLOCK
VCC
SERIAL OUT2
SERIAL OUT1
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q13
Q14
Q15
Q16
GND
SUSTAIN
NC
LATCH ENABLE
NC
VCC
DATA IN2
DATA IN1
SN751508 ...FT PACKAGE
(TOP VIEW)
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Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q13
Q14
Q15
Q16
GND
SUSTAIN
NC
LATCH ENABLE
NC
VCC
DATA IN2
DATA IN1
Q32
Q31
Q30
Q29
Q28
Q27
Q26
Q25
Q24
Q23
Q22
Q21
Q20
Q19
Q18
Q17
GND
NC
STROBE
NC
CLOCK
VCC
SERIAL OUT2
SERIAL OUT1
SN751518 ...FT PACKAGE
(TOP VIEW)
NC – No internal connection


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