CY28352

Rev 1.0, November 21, 2006

Page 3 of 7

Serial Control Registers

Following the acknowledge of the Address Byte, two additional

bytes must be sent:

• Command Code byte

• Byte Count byte.

Byte0: Output Register1 (1 = Enable, 0 = Disable)

Bit

@Pup

Pin#

Description

7

1

2, 1

CLKT0, CLKC0

6

1

4, 5

CLKT1, CLKC1

51–

Reserved

41–

Reserved

3

1

13, 14

CLKT2, CLKC2

2

1

26, 27

CLKT5, CLKC5

11–

Reserved

0

1

24, 25

CLKT4, CLKC4

Byte1: Output Register 2 (1 = Enable, 0 = Disable)

Bit

@Pup

Pin#

Description

71–

Reserved

6

1

17, 16

CLKT3, CLKC3

50–

Reserved

40–

Reserved

30–

Reserved

20–

Reserved

10–

Reserved

00–

Reserved

Byte2: Test Register 3

Bit

@Pup

Pin#

Description

7

1

–

0 = PLL leakage test, 1 = disable test

6

1

–

Reserved

5

0

–

Reserved

4

0

–

Reserved

3

0

–

Reserved

2

0

–

Reserved

1

0

–

Reserved

0

0

–

Reserved