11

This is a developmental specification and is subject to change without notice.

N256S0818HDA/N256S0830HDA

AMI Semiconductor, Inc.

Advance Information

WRITE Status Register Instruction (WRSR)

This instruction provides the ability to write the status register and select among several operating modes.

Several of the register bits must be set to a low ‘0’ if any of the other bits are written. The timing sequence

to write to the status register is shown below, followed by the organization of the status register.

WRITE Status Register Sequence

Status Register

CS

Instruction

SI

04

3

25

16

9

810

711

SCK

7

654

3

210

High-Z

Status Register Data In

SO

00

0

00

1

0

12

13

14

15

0

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Hold Function

0 = Hold (Default)

1 = No Hold

Reserved

Must = 0

Reserved

Must = 0

Mode

0 0 = Word Mode

(Default)

1 0 = Page Mode

0 1 = Burst Mode

1 1 = Reserved