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LTC3822EDD Datasheet(PDF) 9 Page - Linear Technology

Part # LTC3822EDD
Description  No RSENSETM, Low Input Voltage, Synchronous Step-Down DC/DC Controller
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3822EDD Datasheet(HTML) 9 Page - Linear Technology

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LTC3822
3822f
DUTY CYCLE (%)
10
60
80
110
100
90
3822 F01
40
20
50
70
90
30
10
0
30
50
70
20
0
40
60
80
100
Frequency Selection and Phase-Locked Loop
(FREQ Pins)
The selection of switching frequency is a tradeoff between
efficiency and component size. Low frequency operation
increases efficiency by reducing MOSFET switching losses,
but requires larger inductance and/or capacitance to main-
tain low output ripple voltage.
The switching frequency of the LTC3822 is controlled via
the FREQ pin. The FREQ pin can be floated, tied to VIN
or tied to GND to select 550kHz, 750kHz or 300kHz,
respectively.
Undervoltage Lockout
To prevent operation of the power supply below safe
input voltage levels, an undervoltage lockout is incorpo-
rated in the LTC3822. When the input supply voltage
(VIN) drops below 2.25V, the external MOSFETs and all
internal circuits are turned off except for the undervoltage
block, which draws only a few microamperes.
Peak Current Sense Voltage Selection and Slope
Compensation (IPRG Pin)
When the LTC3822 controller is operating below 20% duty
cycle, the peak current sense voltage (between the VIN and
SW pins) allowed across the external top-side MOSFET is
determined by:
=
VA
VV
SENSE MAX
ITH
()
–.
07
10
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN
selects A = 5/3; tying IPRG to GND selects A = 2/3. The
maximum value of VITH is typically about 1.98V, so the
maximum sense voltage allowed across the external
P-channel MOSFET is 120mV, 82mV or 200mV for the
three respective states of the IPRG pin.
However, once the controller’s duty cycle exceeds 20%,
slope compensation begins and effectively reduces the
peak sense voltage by a scale factor (SF) given by the curve
in Figure 1.
The peak inductor current is determined by the peak sense
voltage and the on-resistance of the external P-channel
MOSFET:
I
V
R
PK
SENSE MAX
DS ON
=
()
()
Boost Capacitor Refresh Timeout
In order to maintain sufficient charge across CB, the
converter will briefly turn off the top MOSFET and turn on
the bottom MOSFET if at any time the bottom MOSFET
has remained off for 10 switching cycles. This most
commonly occurs in a dropout situation.
OPERATIO (Refer to Functional Diagram)
Figure 1. Maximum Peak Current vs Duty Cycle


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