SN74LVCH16374A

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUTS

SCAS565L – MARCH 1996 – REVISED SEPTEMBER 2003

4

POST OFFICE BOX 655303

recommended operating conditions (see Note 4)

MIN

MAX

UNIT

VCC

Supply voltage

Operating

1.65

3.6

V

VCC

Supply voltage

Data retention only

1.5

V

V

High-level input voltage

VCC = 1.65 V to 1.95 V

0.65

× VCC

V

VIH

High-level input voltage

VCC = 2.3 V to 2.7 V

1.7

V

IH

VCC = 2.7 V to 3.6 V

2

V

Low-level input voltage

VCC = 1.65 V to 1.95 V

0.35

× VCC

V

VIL

Low-level input voltage

VCC = 2.3 V to 2.7 V

0.7

V

IL

VCC = 2.7 V to 3.6 V

0.8

VI

Input voltage

0

5.5

V

VO

Output voltage

High or low state

0

VCC

V

VO

Output voltage

3-state

0

5.5

V

I

High-level output current

VCC = 1.65 V

–4

mA

IOH

High-level output current

VCC = 2.3 V

–8

mA

IOH

High-level output current

VCC = 2.7 V

–12

mA

VCC = 3 V

–24

I

Low-level output current

VCC = 1.65 V

4

mA

IOL

Low-level output current

VCC = 2.3 V

8

mA

IOL

Low-level output current

VCC = 2.7 V

12

mA

VCC = 3 V

24

∆t/∆v Input transition rise or fall rate

10

ns/V

TA

Operating free-air temperature

–40

85

°C

NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.