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PLL500-17DC Datasheet(PDF) 4 Page - PhaseLink Corporation

Part # PLL500-17DC
Description  Low Phase Noise VCXO (17MHz to 36MHz)
Download  6 Pages
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Manufacturer  PLL [PhaseLink Corporation]
Direct Link  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

PLL500-17DC Datasheet(HTML) 4 Page - PhaseLink Corporation

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PLL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/08/06 Page 4
4. Jitter and Phase Noise Specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
RMS Period Jitter
(1 sigma – 1000 samples)
With capacitive decoupling between
VDD and GND.
2.5
ps
Phase Noise relative to carrier
36MHz @100Hz offset
-80
dBc/Hz
Phase Noise relative to carrier
36MHz @1kHz offset
-110
dBc/Hz
Phase Noise relative to carrier
36MHz @10kHz offset
-130
dBc/Hz
Phase Noise relative to carrier
36MHz @100kHz offset
-138
dBc/Hz
Phase Noise relative to carrier
36MHz @1MHz offset
-145
dBc/Hz
5. DC Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current, Dynamic,
with Loaded Outputs
IDD
FXIN = 36MHz
Output load of 15pF
5
6
mA
Operating Voltage
VDD
2.25
3.63
V
Output Low Voltage at
CMOS level
VOLC
IOL = +4mA
0.4
V
Output High Voltage at
CMOS level
VOHC
IOH = -4mA
VDD – 0.4
V
Output drive current
For VOL<0.4V or VOH>2.4V
8
9.5
mA
Short Circuit Current
±50
mA
VCXO Control Voltage
VCON
0
VDD
V
6. Crystal Specifications
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
FXIN
17
36
MHz
Crystal Loading Rating (VCON = 1.65V)
CL (xtal)
8.5
pF
Maximum Sustainable Drive Level
200
µW
Operating Drive Level
50
µW
C0
5
pF
C0/C1
250
-
ESR
RS
30
Note: The crystal must be such that it oscillates (parallel resonant) at nominal frequency when presented a C Load as specified above.
If the crystal requires more load to be at nominal frequency, the additional load must be added externally.
This however may reduce the pull range.


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