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PL611S-XXXUIR Datasheet(PDF) 1 Page - PhaseLink Corporation |
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PL611S-XXXUIR Datasheet(HTML) 1 Page - PhaseLink Corporation |
1 / 6 page (Preliminary) PL611s-16 1.8V-3.3V PicoPLLTM 32K Programmable Clock 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/18/06 Page 1 FEATURES • Designed for Very Low-Power applications o <1.2mA @ 27MHz o < 5µA when PDB is activated • Input Frequency: 10KHz – 200MHz • OTP selectable AC/DC Ref. Coupling. • Accepts <1.0V reference signal input voltage • Output frequency up to 54MHz o 35MHz @ 1.8V operation o 45MHz @ 2.5V operation o 55MHz @ 3.3V operation • Offered in Tiny GREEN/RoHS compliant packages o 6-pin DFN (2.0mmx1.3mmx0.6mm) o 6-pin SC70 (2.3mmx2.25mmx1.0mm) o 6-pin SOT23 (3.0mmx3.0mmx1.35mm) • Very low Jitter and Phase Noise • Single 1.8V, 2.5V, or 3.3V ± 10% power supply • Operating temperature range from 0°C to 70°C DESCRIPTION The PL611s-16 is a very low-power general purpose frequency synthesizer and a member of PhaseLink’s PicoPLL Factory Programmable ‘Quick Turn Clock (QTC)’ family. Designed to fit in a small DFN, SC70, or SOT23 package for high performance applications, PL611s-16 accepts low frequency (10KHz) Reference input and generates up to 54MHz output with the best phase noise, jitter performance, and power consumption for handheld devices and notebook applications. Cascading PL611s-16 with other PicoPLL ICs could result in producing all required system clocks with specific savings in board space, power consumption, and cost. PACKAGE PIN ASSIGNMENT BLOCK DIAGRAM Charge Pump VCO FIN Programmable Function Phase Detector R-Counter (7-bit) M-Counter (16-bit) P-Counter (4-bit) FVCO = FRef * (2* M/R) CLK0 FOut = FVCO /2*P 1 2 34 5 6 VDD GNDA FIN GND LF CLK0 DFN-6L (2.0mmx1.3mmx0.6mm) SOT23-6L (3.0mmx3.0mmx1.35mm) 1 2 34 5 6 FIN GNDA VDD GND SC70-6L (2.3mmx2.25mmx1.0mm) LF CLK0 FIN VDD LF GND CLK0 GNDA 1 2 3 6 5 4 |
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