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SST27VF010-70-3C-NHE Datasheet(PDF) 2 Page - Silicon Storage Technology, Inc |
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SST27VF010-70-3C-NHE Datasheet(HTML) 2 Page - Silicon Storage Technology, Inc |
2 / 18 page 2 Preliminary Specifications 1 Mbit / 2 Mbit Many-Time Programmable Flash SST27VF010 / SST27VF020 ©2003 Silicon Storage Technology, Inc. S71251-00-000 12/03 Byte-Program Operation The SST27VF010/020 are programmed by using an exter- nal programmer. The programming mode for SST27VF010/020 is activated by asserting 11.4-12.0V on VPP pin, VDD = 2.7-3.6V, VIL on CE# pin, and VIH on OE# pin. These devices are programmed byte-by-byte with the desired data at the desired address using a single pulse (PGM# pin low for SST27VF010/020) of 15 µs. Using the MTP programming algorithm, the Byte-Programming pro- cess continues byte-by-byte until the entire chip has been programmed. Chip-Erase Operation The only way to change a data from a “0” to “1” is by electri- cal erase that changes every bit in the device to “1”. Unlike traditional EPROMs, which use UV light to do the Chip- Erase, the SST27VF010/020 uses an electrical Chip-Erase operation. This saves a significant amount of time (about 30 minutes for each Erase operation). The entire chip can be erased in a single pulse of 100 ms (PGM# pin for SST27VF010/020). In order to activate the Erase mode for SST27VF010/020, the 11.4-12.6V is applied to the A9 pin, 11.4-12.0V is applied to the VPP pin, VDD = 2.7-3.6V, VIL on CE# pin, and VIH on OE# pin. All other address and data pins are “don’t care”. The falling edge of CE# (PGM# for SST27VF010/020) will start the Chip-Erase operation. Once the chip has been erased, all bytes must be verified for FFH. Refer to Figure 9 for the flowchart. Product Identification Mode The Product Identification mode identifies the devices as the SST27VF010 or SST27VF020 and manufacturer as SST. This mode may be accessed by the hardware method. To activate this mode for SST27VF010/020, the programming equipment must force VH (11.4-12.6V) on address A9 with VPP pin at VDD (2.7-3.6V) or VSS. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0. For details, see Table 3 for hardware operation. TABLE 1: PRODUCT IDENTIFICATION Address Data Manufacturer’s ID 0000H BFH Device ID SST27VF010 0001H A9H SST27VF020 0001H AAH T1.0 1251 Y-Decoder I/O Buffers 1251 B1.0 Address Buffer X-Decoder DQ7 - DQ0 AMS - A0 A9 OE# CE# SuperFlash Memory Control Logic PGM# VPP AMS = A17 for SST27VF020, A16 for SST27VF010 FUNCTIONAL BLOCK DIAGRAM OF THE SST27VF010/020 |
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