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LT1011CN8 Datasheet(PDF) 6 Page - Linear Technology |
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LT1011CN8 Datasheet(HTML) 6 Page - Linear Technology |
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6 / 16 page  6 LT1011/LT1011A TYPICAL PERFOR A CE CHARACTERISTICS Input Offset Voltage vs Common Mode Voltage COMMON MODE VOLTAGE (V) V – V + 0.5 1.5 2.5 1011 G19 – 0.5 –1.5 0 1.0 2.0 –1.0 – 2.0 – 2.5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 TJ = 25°C UPPER COMMON MODE LIMIT = V + – (1.5V) V – (OR GND WITH SINGLE SUPPLY) TEMPERATURE ( °C) –50 – 25 0 0.2 0.4 75 100 125 150 1011 G20 –150mV –100mV – 50mV 0 0 25 50 0.8 0.6 CHANGE IN VOS FOR CURRENT INTO PINS 5 OR 6 VOLTAGE ON PINS 5 AND 6 WITH RESPECT TO V + Offset Pin Characteristics APPLICATIONS INFORMATION Preventing Oscillation Problems Oscillation problems in comparators are nearly always caused by stray capacitance between the output and inputs or between the output and other sensitive pins on the comparator. This is especially true with high gain bandwidth comparators like the LT1011, which are designed for fast switching with millivolt input signals. The gain bandwidth product of the LT1011 is over 10GHz. Oscillation problems tend to occur at frequencies around 5MHz, where the LT1011 has a gain of ≈2000. This implies that attenuation of output signals must be at least 2000:1 at 5MHz as measured at the inputs. If the source impedance is 1k Ω, the effective stray capaci- tance between output and input must have a reactance of more than (2000)(1k Ω) = 2MΩ, or less than 0.02pF. The actual interlead capacitance between input and out- put pins on the LT1011 is less than 0.002pF when cut to printed circuit mount length. Additional stray capaci- tance due to printed circuit traces must be minimized by routing the output trace directly away from input lines and, if possible, running ground traces next to input traces to provide shielding. Additional steps to ensure oscillation-free operation are: 1. Bypass the STROBE/BALANCE pins with a 0.01 µF capacitor connected from Pin 5 to Pin 6. This elimi- nates stray capacitive feedback from the output to the BALANCE pins, which are nearly as sensitive as the inputs. 2. Bypass the negative supply (Pin 4) with a 0.1 µF ceramic capacitor close to the comparator. 0.1 µF can also be used for the positive supply (Pin 8) if the pull- up load is tied to a separate supply. When the pull-up load is tied directly to Pin 8, use a 2 µF solid tantalum bypass capacitor. 3. Bypass any slow moving or DC input with a capacitor ( ≥0.01µF) close to the comparator to reduce high frequency source impedance. 4. Keep resistive source impedance as low as possible. If a resistor is added in series with one input to balance source impedances for DC accuracy, bypass it with a capacitor. The low input bias current of the LT1011 usually eliminates any need for source resistance bal- ancing. A 5k Ω imbalance, for instance, will create only 0.25mV DC offset. 5. Use hysteresis. This consists of shifting the input offset voltage of the comparator when the output changes state. Hysteresis forces the comparator to move quickly through its linear region, eliminating oscillations by “overdriving” the comparator under all input conditions. Hysteresis may be either AC or DC. AC techniques do not shift the apparent offset voltage |
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