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SST27SF512 Datasheet(PDF) 2 Page - Silicon Storage Technology, Inc |
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SST27SF512 Datasheet(HTML) 2 Page - Silicon Storage Technology, Inc |
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2 / 23 page  2 Data Sheet 512 Kbit / 1 Mbit / 2 Mbit Many-Time Programmable Flash SST27SF512 / SST27SF010 / SST27SF020 ©2005 Silicon Storage Technology, Inc. S71152-11-000 9/05 Byte-Program Operation The SST27SF512/010/020 are programmed by using an external programmer. The programming mode for SST27SF010/020 is activated by asserting 11.4-12V on VPP pin, VDD = 4.5-5.5V, VIL on CE# pin, and VIH on OE# pin. The programming mode for SST27SF512 is activated by asserting 11.4-12V on OE#/VPP pin, VDD = 4.5-5.5V, and VIL on CE# pin. These devices are programmed byte- by-byte with the desired data at the desired address using a single pulse (CE# pin low for SST27SF512 and PGM# pin low for SST27SF010/020) of 20 µs. Using the MTP pro- gramming algorithm, the Byte-Programming process con- tinues byte-by-byte until the entire chip has been programmed. Chip-Erase Operation The only way to change a data from a “0” to “1” is by electri- cal erase that changes every bit in the device to “1”. Unlike traditional EPROMs, which use UV light to do the Chip- Erase, the SST27SF512/010/020 uses an electrical Chip- Erase operation. This saves a significant amount of time (about 30 minutes for each Erase operation). The entire chip can be erased in a single pulse of 100 ms (CE# pin low for SST27SF512 and PGM# pin for SST27SF010/ 020). In order to activate the Erase mode for SST27SF010/ 020, the 11.4-12V is applied to VPP and A9 pins, VDD = 4.5- 5.5V, VIL on CE# pin, and VIH on OE# pin. In order to acti- vate Erase mode for SST27SF512, the 11.4-12V is applied to OE#/VPP and A9 pins, VDD = 4.5-5.5V, and VIL on CE# pin. All other address and data pins are “don’t care”. The falling edge of CE# (PGM# for SST27SF010/020) will start the Chip-Erase operation. Once the chip has been erased, all bytes must be verified for FFH. Refer to Figures 11 and 12 for the flowcharts. Product Identification Mode The Product Identification mode identifies the devices as the SST27SF512, SST27SF010 and SST27SF020 and manufacturer as SST. This mode may be accessed by the hardware method. To activate this mode for SST27SF010/ 020, the programming equipment must force VH (11.4-12V) on address A9 with VPP pin at VDD (4.5-5.5V) or VSS. To activate this mode for SST27SF512, the programming equipment must force VH (11.4-12V) on address A9 with OE#/VPP pin at VIL. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0. For details, see Tables 3 and 4 for hardware operation. TABLE 1: PRODUCT IDENTIFICATION Address Data Manufacturer’s ID 0000H BFH Device ID SST27SF512 0001H A4H SST27SF010 0001H A5H SST27SF020 0001H A6H T1.2 1152 |
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