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SST29EE512-70-4C-NHE Datasheet(PDF) 1 Page - Silicon Storage Technology, Inc |
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SST29EE512-70-4C-NHE Datasheet(HTML) 1 Page - Silicon Storage Technology, Inc |
1 / 26 page ©2005 Silicon Storage Technology, Inc. S71060-09-000 9/05 1 The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. SSF is a trademark of Silicon Storage Technology, Inc. These specifications are subject to change without notice. Data Sheet 512 Kbit (64K x8) Page-Write EEPROM SST29EE512 FEATURES: • Single Voltage Read and Write Operations – 4.5-5.5V for SST29EE512 • Superior Reliability – Endurance: 100,000 Cycles (typical) – Greater than 100 years Data Retention • Low Power Consumption – Active Current: 20 mA (typical) – Standby Current: 10 µA (typical) • Fast Page-Write Operation – 128 Bytes per Page, 512 Pages – Page-Write Cycle: 5 ms (typical) – Complete Memory Rewrite: 2.5 sec (typical) – Effective Byte-Write Cycle Time: 39 µs (typical) • Fast Read Access Time – 4.5-5.5V operation: 70 ns • Latched Address and Data • Automatic Write Timing – Internal VPP Generation • End of Write Detection – Toggle Bit – Data# Polling • Hardware and Software Data Protection • Product Identification can be accessed via Software Operation • TTL I/O Compatibility • JEDEC Standard – Flash EEPROM Pinouts and command sets • Packages Available – 32-lead PLCC – 32-lead TSOP (8mm x 20mm) – 32-pin PDIP • All non-Pb (lead-free) devices are RoHS compliant PRODUCT DESCRIPTION The SST29EE512 is a 64K x8 CMOS, Page-Write EEPROM manufactured with SST’s proprietary, high-per- formance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST29EE512 writes with a single power supply. Internal Erase/Program is transparent to the user. The SST29EE512 conforms to JEDEC stan- dard pin assignments for byte-wide memories. Featuring high performance Page-Write, the SST29EE512 provides a typical Byte-Write time of 39 µsec. The entire memory, i.e., 64 KByte, can be written page-by-page in as little as 2.5 seconds, when using interface features such as Toggle Bit or Data# Polling to indicate the completion of a Write cycle. To protect against inadvertent write, the SST29EE512 have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, the SST29EE512 is offered with a guar- anteed Page-Write endurance of 10,000 cycles. Data retention is rated at greater than 100 years. The SST29EE512 is suited for applications that require convenient and economical updating of program, config- uration, or data memory. For all system applications, the SST29EE512 significantly improves performance and reliability, while lowering power consumption. The SST29EE512 improves flexibility while lowering the cost for program, data, and configuration storage applications. To meet high density, surface mount requirements, the SST29EE512 is offered in 32-lead PLCC and 32-lead TSOP packages. A 600-mil, 32-pin PDIP package is also available. See Figures 1, 2, and 3 for pin assignments. Device Operation The SST Page-Write EEPROM offers in-circuit electrical write capability. The SST29EE512 does not require sepa- rate Erase and Program operations. The internally timed Write cycle executes both erase and program transparently to the user. The SST29EE512 has industry standard optional Software Data Protection, which SST recom- mends always to be enabled. The SST29EE512 is com- patible with industry standard EEPROM pinouts and functionality. SST29EE512512Kb (x8) Page-Write, Small-Sector flash memories |
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