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AK4529 Datasheet(PDF) 10 Page - Asahi Kasei Microsystems

Part No. AK4529
Description  High Performance Multi-channel Audio CODEC
Download  38 Pages
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Manufacturer  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK4529 Datasheet(HTML) 10 Page - Asahi Kasei Microsystems

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ASAHI KASEI
[AK4529]
MS0082-E-00
2001/3
- 10 -
SWITCHING CHARACTERISTICS
(Ta=25
°C; AVDD, DVDD=4.5∼5.5V; TVDD=2.7∼5.5V; C
L=20pF)
Parameter
Symbol
min
typ
max
Units
Master Clock Timing
256fsn, 128fsd:
Pulse Width Low
Pulse Width High
384fsn, 192fsd:
Pulse Width Low
Pulse Width High
512fsn, 256fsd:
Pulse Width Low
Pulse Width High
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
8.192
27
27
12.288
20
20
16.384
15
15
12.288
18.432
24.576
MHz
ns
ns
MHz
ns
ns
MHz
ns
ns
LRCK Timing
TDM= “0”
Normal Speed Mode
Double Speed Mode
Duty Cycle
fsn
fsd
Duty
32
64
45
48
96
55
kHz
kHz
%
TDM= “1”
LRCK frequency
“H” time
“L” time
fsn
tLRH
tLRL
32
1/256fs
1/256fs
48
kHz
ns
ns
Audio Interface Timing
TDM= “0”
BICK Period
BICK Pulse Width Low
Pulse Width High
LRCK Edge to BICK “
↑”
(Note 17)
BICK “
↑” to LRCK Edge
(Note 17)
LRCK to SDTO(MSB)
BICK “
↓” to SDTO
SDTI1-4, DAUX Hold Time
SDTI1-4, DAUX Setup Time
tBCK
tBCKL
tBCKH
tLRB
tBLR
tLRS
tBSD
tSDH
tSDS
160
65
65
45
45
40
25
40
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
TDM= “1”
BICK Period
BICK Pulse Width Low
Pulse Width High
LRCK Edge to BICK “
↑”
(Note 17)
BICK “
↑” to LRCK Edge
(Note 17)
BICK “
↓” to SDTO
SDTI1 Hold Time
SDTI1 Setup Time
tBCK
tBCKL
tBCKH
tLRB
tBLR
tBSD
tSDH
tSDS
81
32
32
20
20
10
10
20
ns
ns
ns
ns
ns
ns
ns
ns
Notes: 17. BICK rising edge must not occur at the same time as LRCK edge.


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