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TPS3707-50DGN Datasheet(PDF) 5 Page - Texas Instruments |
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TPS3707-50DGN Datasheet(HTML) 5 Page - Texas Instruments |
5 / 22 page TPS3705xx TPS3707xx PROCESSOR SUPERVISORY CIRCUITS WITH POWERFAIL SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS370xY chip information These chips, when properly assembled, display characteristics similar to those of the TPS370x. Thermal compression or ultrasonic bonding may be caused on the doped-aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform. TPS3705Y TPS3707Y (1) (2) (3) (8) (6) BONDING PAD ASSIGNMENTS CHIP THICKNESS: 10 MILS TYPICAL BONDING PADS: 4 × 4 MINIMUM TJ max = 150°C TOLERANCES ARE ±10% ALL DIMENSIONS ARE IN MILS 46 50 (4) (7) (5) Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION MR 1 I Manual reset VDD 2 Supply voltage GND 3 Ground PFI 4 I Power-fail comparator input PFO 5 O Power-fail comparator output WDI TPS3705 6 I Watchdog timer input NC TPS3707 6 No internal connection RESET 7 O Active-low reset output WDO TPS3705 8 O Watchdog timer output RESET TPS3707 8 O Active-high reset output |
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