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SAA7385 Datasheet(PDF) 37 Page - NXP Semiconductors

Part No. SAA7385
Description  Error correction and host interface IC for CD-ROM SEQUOIA
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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SAA7385 Datasheet(HTML) 37 Page - NXP Semiconductors

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1996 Jun 19
37
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SAA7385
transferred, the second offset block as specified by
SCSIOFFS-B and SCSIOFFE-B is transferred. The frame
address will not be incremented until after both offset
blocks are transferred. Once both offset blocks are
transferred, the frame address is incremented and again
the two offset blocks are transferred for the next frame.
Reading and writing of the A and the B registers is
controlled by an automatic switching after the most
significant bytes of the registers are written. After
power-up or reset the pointer to the A registers will be
selected. If the dual offset mode is selected, the A/B switch
will be toggled when the most significant bytes of the
registers are written; either the most significant bytes of
SCSIOFFS or SCSIOFFE. Any future reads or writes will
access the B registers.
The process of loading and reading the two SCSI offset
address pairs can be monitored and controlled by
OFF_STR and OFF_END from SCSIMOD. Reading
OFF_STR shows the status of the A/B switch for the
SCSIOFFS-A/B registers; reading OFF_END shows the
status of the A/B switch for the SCSIOFFE-A/B registers.
A write to SCSIMOD with OFF_STR LOW will clear the
A/B switch for the SCSIOFFS registers; a write to
SCSIMOD with OFF_END LOW will clear the A/B switch
for the SCSIOFFE registers.
SCSISFRM is used to determine the starting frame
address for all SCSI operations. The associated counter is
automatically incremented after each frame, and is cleared
when the last frame as specified by LASTFRM is
transferred. To update the SCSI frame address counter,
SCSISFRM must be rewritten. The current SCSI frame
address is available by reading SCSICFRM. The frame
counter is automatically cleared at the end of the frame
buffer memory and thus multiple passes of a non-zero start
address will require a re-load for each pass; it is not
practical to do this in real-time.
The SCSIOFFS registers access either one or two register
pairs as controlled by SCSIMOD. SCSIOFFS determines
the starting offset address for a SCSI transfer.
The SCSIOFFE register accesses either one or two
register pairs as controlled by SCSIMOD. SCSIOFFE
determines the ending offset address for a SCSI transfer.
Remarks:
• If two offset pairs are used, the A start offset must be
written last to ensure that the correct offset start address
is loaded into the counter.
• In the two offset mode, reading the register after loading
is not possible due to the automatic switching feature; if
the A offset pair is written, and the register pair is read,
the B offset pair would be read.
Table 53 SCSI offset start register (A and B): 0xF0E8, F0E9; note 1
Note
1. These registers, together with the offset end registers, allow full control over the number of frame bytes that will be
transferred to the SCSI port.
MNEMONIC
R/W
DATA BYTE
76543210
SCSIOFFS
R/W
OFFSET7 to OFFSET0
SCSIOFFS
R/W
−−−−
OFFSET11 to OFFSET8


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