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SAA7385 Datasheet(PDF) 30 Page - NXP Semiconductors

Part No. SAA7385
Description  Error correction and host interface IC for CD-ROM SEQUOIA
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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SAA7385 Datasheet(HTML) 30 Page - NXP Semiconductors

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1996 Jun 19
30
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SAA7385
Table 38 DRAM selection/test mode: 0xF0FE; note 1
Note
1. After power-up or reset, DRAMSEL should be the first register that is programmed. This register is used to select the
number and the type of DRAMs used. The output of this register is used to control the DRAM access directly and will
affect any current DRAM cycle.
Table 39 SCSIMOD field description
MNEMONIC
R/W
DATA BYTE
7
6543
2
1
0
DRAMSEL
R/W
TEST
RESTEST3 to RESTEST0
DBL_SPD
1_MEG
2_DRAMS
FIELD
LOGIC
DESCRIPTION
2_DRAMS
0
single DRAM used
1
two DRAMs used
1_MEG
0
256 k
×4
11 M
×4
DBL_SPD
0
single speed refresh; condition after reset
1
double speed refresh; only set if system is running at 0.5 master clock speed
RESTEST3
to
RESTEST0
reserved for test: enable DRAM access test; switch multiplexer control, enable interrupts
TEST
0
normal operation
1
test mode; read back of RESTEST3 to RESTEST0 is gated by this bit


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