Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

SAA7385 Datasheet(PDF) 29 Page - NXP Semiconductors

Part No. SAA7385
Description  Error correction and host interface IC for CD-ROM SEQUOIA
Download  64 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo 

SAA7385 Datasheet(HTML) 29 Page - NXP Semiconductors

Zoom Inzoom in Zoom Outzoom out
 29 / 64 page
background image
1996 Jun 19
29
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SAA7385
9.2
Miscellaneous control registers
Table 34 53CF90 direction and audio mode control: 0xF0C1; note 1
Note
1. Register 0xF0C1 controls the audio mode byte swapping and a test mode bit.
Table 35 WTDIR field descriptions
Table 36 SCSI mode control register: 0xF0FD; note 1
Note
1. Register 0xF0FD controls the operation of the interface to the SCSI controller. The outputs of these registers are
used to directly control DRAM access cycles, and will affect any current DRAM cycle in progress.
Table 37 SCSIMOD field description
MNEMONIC
R/W
DATA BYTE
7
6
543210
AUSWP
R/W
TEST
−−
OVER4X
BSB
−−
FIELD
DESCRIPTION
BSB
Byte swap bit. Defaults to swapping the most significant byte and least significant byte in the audio
mode such that the least significant byte of all audio samples is stored at even addresses in the
DRAM. Setting this HIGH causes the audio data to be stored in the same way as in the data mode.
OVER4X
4
× over-sampling bit selection; default LOW select transmit, or no over-sampling, mode for the
sub-code and C-flag UARTs. Setting this bit HIGH will cause the sub-code and C-flag data to be
sampled at one quarter the data rate allowing Q-channel information to be correctly stored in the
registers while the CD-60 is outputting audio data at 4
× over-sampling.
TEST
Enables internal signals to be multiplexed out when the TEST pin (pin 125) is HIGH.
MNEMONIC
R/W
DATA BYTE
7
6
5
43210
SCSIMOD
R/W
−−−
OFF_ADR
OFF_END
OFF_STR
RD_BUF
BYT/PAG
FIELD
LOGIC
DESCRIPTION
BYT/PAG
0
SCSI DRAM byte mode access
1
SCSI DRAM page mode access
RD_BUF
0
SCSI read/write control; read from buffer memory
1
SCSI read/write control; write to buffer memory
OFF_STR
0
SCSI offset start A/B control; select A registers
1
SCSI offset start A/B control; select B registers
OFF_END
0
SCSI offset end A/B control; select A registers
1
SCSI offset end A/B control; select B registers
OFF_ADR
0
SCSI transfers use only A registers
1
SCSI transfers use A and B registers


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn