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SAA7385 Datasheet(PDF) 18 Page - NXP Semiconductors

Part No. SAA7385
Description  Error correction and host interface IC for CD-ROM SEQUOIA
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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SAA7385 Datasheet(HTML) 18 Page - NXP Semiconductors

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1996 Jun 19
18
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SAA7385
Table 5
Definitions of ECC_COMMAND3 to ECC_COMMAND0
Table 6
Command descriptions
EEC_COMMAND
DESCRIPTION
0000
ASSERT_ABORT
0001
RELEASE_ABORT
0010
CALCULATE_SYNDROMES (not Mode 2, Form 1)
0011
CALCULATE_SYNDROMES (Mode 2, Form 1)
0100
CRC_RECALCULATE (not Mode 2, Form 1)
0101
CRC_RECALCULATE (Mode 2, Form 1)
0110
COPY_RESULTS (not Mode 2, Form 1)
0111
COPY_RESULTS (Mode 2, Form 1)
1000
CORRECT_P_SYNDROMES
1001
CORRECT_Q_SYNDROMES
1100
TEST_ECC_ROM
1101
TEST_ECC_RAM_READ
1110
TEST_ECC_RAM_WRITE
COMMAND
DESCRIPTION
ASSERT_ABORT
Terminates any currently active operation and re-initializes the ECC logic. Remains in
reset state until occurrence of the RELEASE_ABORT command. At power-on reset,
the ECC is in the ASSERT_ABORT state. All microcontroller status bits are reset
when the ECC is in the ASSERT_ABORT state.
RELEASE_ABORT
Terminates the ASSERT_ABORT command and enables activation of other
commands.
CRC_RECALCULATE
Calculate CRC remainder buffer data, storing result in ECC RAM and updating
microcontroller status bit CRC_EQ0. Mode 2, Form 1 uses address 16 : 2075, or
0 : 2067; note 1.
CALCULATE_SYNDROMES
Prepares buffer for correction, calculates P and Q syndromes, and copies error flags
and CRC remainder from buffer to ECC RAM. The microcontroller status bits
PS_EQ0, QS_EQ0 and FLAGS_EQ0 are updated at the end of this operation.
1. Copy header from buffer to ECC RAM (Mode 2, Form 1 only)
2. Write to the buffer.
Not Mode 2, Form 1:
Address 0
→ 0x00; Address1:10 → 0xFF; Address 11 → 0x00;
Address 2068 : 2075
→ 0x00
Mode 2, Form 1:
Address 0
→ 0x00; Add1:10 → 0xFF; Add 11 : 15 → 0x00
3. Read header and frame data from buffer to calculate P and Q syndromes
psyn[0 : 85].s1, psyn[0 : 85].s0, qsyn[0 : 51].s1 and qsyn[0 : 51].s0, storing
results in ECC RAM; see Table 76
4. Copy error flags from buffer to ECC RAM
5. Copy CRC remainder from buffer to ECC RAM
6. Update microcontroller status bits PS_EQ0, QS_EQ0 and FLAGS_EQ0.


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