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SAA7385 Datasheet(PDF) 17 Page - NXP Semiconductors

Part No. SAA7385
Description  Error correction and host interface IC for CD-ROM SEQUOIA
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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SAA7385 Datasheet(HTML) 17 Page - NXP Semiconductors

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1996 Jun 19
17
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SAA7385
8
MICROCONTROLLER INTERFACE
8.1
Microcontroller interface status register
Table 1
NUM_COR register: 0xF08E
Register 0xF08E indicates the number of corrections performed during the most recently executed
CORRECT_P_SYNDROMES or CORRECT_Q_SYNDROMES command. Note that NUM_COR is only valid after
completion of the CORRECT_P_SYNDROMES or CORRECT_Q_SYNDROMES command, and becomes invalid upon
execution of any other command.
Table 2
ECC_STATUS register: 0xF086
Register 0xF086 provides status information on the current or last ECC command.
Table 3
ECC_STATUS definitions
8.2
Microcontroller interface command register
Table 4
ECCCTL register: 0xF085
The ECC_COMMAND definitions are explained in Table 5.
MNEMONIC
R/W
DATA BYTE
76543210
NUM_COR
R
NUM_COR7 to NUM_COR0
MNEMONIC
R/W
DATA BYTE
7
6
5
43210
ECC_STATUS
R
−−−
FLG_EQ0 CRC_EQ0
PS_EQ0
QS_EQ0
ECC_ACT
MNEMONIC
DESCRIPTION
ECC_ACT
asserted while a command other than ASSERT_ABORT or RELEASE_ABORT remains active
QS_EQ0
asserted when all Q syndromes are zero
PS_EQ0
asserted when all P syndromes are zero
CRC_EQ0
asserted when the CRC remainder calculated by the CRC_CALCULATE command is all zeros
FLG_EQ0
asserted when all flag bytes in ECC RAM are zero
MNEMONIC
R/W
DATA BYTE
7
6
5
43210
ECCCTL
R/W
−−−
ECC_COMMAND3 to ECC_COMMAND0


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