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SAA7385 Datasheet(PDF) 5 Page - NXP Semiconductors |
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SAA7385 Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 64 page 
1996 Jun 19 5 Philips Semiconductors Preliminary specification Error correction and host interface IC for CD-ROM (SEQUOIA) SAA7385 5 BLOCK DIAGRAM 6 PINNING All input, output and bidirectional signals are TTL level unless otherwise stated (Pull-Down = PD25 = 25 µA; Pull-Up = PU25 = 25 µA, PU400 = 400 µA; Slew = S2 = 2 mA, S4 = 4 mA; CMOS slew = CMOS S2 = CMOS 2 = 2 mA; SCSI pad = SCSI = 48 mA). SYMBOL PIN I/O PAD DESCRIPTION DA2 1 O S4 DRAM address bus; bit DA2 DA3 2 O S4 DRAM address bus; bit DA3 DA4 3 O S4 DRAM address bus; bit DA4 VSS1 4 −− ground 1 DA5 5 O S4 DRAM address bus; bit DA5 DA6 6 O S4 DRAM address bus; bit DA6 DA7 7 O S4 DRAM address bus; bit DA7 DA8 8 O S4 DRAM address bus; bit DA8 DA9 9 O S4 DRAM address bus; bit DA9 VDD1 10 −− power supply 1 Fig.1 Block diagram (simplified). handbook, full pagewidth MGE388 DATA CONVERTER AND SUB-CODE UART LAYERED ERROR CORRECTOR BUFFER MAPPER 53CF94 SCSI BUFFER MANAGER data subcode MICROCONTROLLER INTERFACE DEBUG UART 80C32 MICROCONTROLLER CD DECODER SERVO PROCESSOR data SAA7385 subcode C-flag 64K × 8 ROM 256K × 8 or 1M × 8 DRAM BUFFER SCSI interface debug UART S2B serial interface |
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