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SAA7385 Datasheet(PDF) 45 Page - NXP Semiconductors

Part No. SAA7385
Description  Error correction and host interface IC for CD-ROM SEQUOIA
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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SAA7385 Datasheet(HTML) 45 Page - NXP Semiconductors

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1996 Jun 19
45
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SAA7385
13 SUMMARY OF CONTROL REGISTER MAP
Table 77 Control register map for the SAA7385
ADDRESS
MNEMONIC
READ/WRITE
DESCRIPTION
F085
ECCCTL
R/W
ECC control register
F086
ECCSTAT
R
ECC status register
F08E
NUM_COR
R
ECC register for the number of corrections
F091
CLKSEL
W
start the clock synthesizer (doubler)
F092
MODE
R
header mode byte from block decoder
F093
FRMS
R
header frame byte from block decoder
F09A
SECS
R
header seconds byte from block decoder
F09B
MINS
R
header minutes byte from block decoder
F09E
UARTCTL
R/W
UART special control registers
F09F
PRGMEM
R/W
program memory control registers
F0A1
WTS2B
W
S2B UART transmit buffer
F0A2
RDS2B
R
S2B UART receive buffer
F0A3
S2BSTAT
R
S2B UART status register
F0A4
TCLOW
R/W
53CF94 (00); transfer counter low
F0A5
TCMID
R/W
53CF94 (01); transfer counter middle
F0A6
FIFO
R/W
53CF94 (02); FIFO
F0A7
CMD
R/W
53CF94 (03); command register
F0A9
RDTK
R
Q channel track number
F0AA
RDMD
R
Q channel mode number
F0AB
RDMN
R
Q channel minutes number (absolute)
F0AC
STAT
R/W
53CF94 (04); status register and destination ID
F0AD
INT
R/W
53CF94 (05); interrupt register and time-out
F0AE
SEQSTP
R/W
53CF94 (06); sequence step and synchronous transfer period
F0AF
FIFOFLG
R/W
53CF94 (07); FIFO flags and synchronous offset
F0B1
RDSC
R
Q channel seconds (absolute)
F0B2
RDFM
R
Q channel frames (absolute)
F0B3
WTPWM
R/W
pulse width modulator duty cycle select
F0B4
CONFIG1
R/W
53CF94 (08); configuration register number 1
F0B5
CLOCK
W
53CF94 (09); clock conversion factor
F0B6
TEST
W
53CF94 (0A); test mode
F0B7
CONFIG2
R/W
53CF94 (0B); configuration register number 2
F0B9
WTGCTL
W
GLIC control registers (audio control)
F0BA
RDSW
R
drive control switches register
F0BB
FECTL
R/W
front-end control register
F0BC
CONFIG3
R/W
53CF94 (0C); configuration register number 3
F0BD
CONFIG4
R/W
53CF94 (0D); configuration register number 4
F0BE
TCHIGH
R/W
53CF94 (0E); transfer count high and SCSI ID
F0BF
FIFOBTM
W
53CF94 (0F); FIFO bottom
F0C0
BRGSEL
R/W
baud rate generator select register


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