Electronic Components Datasheet Search |
|
SAA7282 Datasheet(PDF) 11 Page - NXP Semiconductors |
|
SAA7282 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 25 page July 1993 11 Philips Semiconductors Product specification Terrestrial Digital Sound Decoder (TDSD2) SAA7282 DIGITAL AUDIO INTERFACE IEC/EBU 958 Block structure The output is grouped into a block of 192 consecutive frames providing, for each channel the 192 channel status data bits. The start of a block is designated by a special sub-frame preamble. Frame structure Each frame is uniquely composed of two sub-frames. The rate of transmission of frames corresponds exactly to the source sampling frequency. In the 2-channel operation, samples taken from both channels are transmitted by time multiplexing in consecutive sub-frames. Sub-frames related to Channel 1 (left or 'A' channel in stereophonic operation and primary channel in monophonic operation) normally use preamble M. However the preamble is changed to preamble B once every 192 frames. This defines the block structure used to organize the channel status information. Sub-frames of Channel 2 (right or 'B' channel in stereophonic operation and secondary channel in monophonic operation) always use preamble W. Sub-frame structure Each frame is divided into 32 time-slots numbered 0 to 31. Time-slots 0 to 3 carry one of three permitted preambles. These are used to affect synchronization of sub-frames, frames and blocks. Time-slots 4 to 27 carry the audio sample word in linear two's complement representation. The most significant bit is carried by time-slot 27. Time-slot 28 carries the validity flag associated with the audio sample word. This flag is set to logic 0 if the audio sample is reliable. If set to logic 1 then the sample is unreliable. Time-slot 29 carries one bit of the user data channel. In this application this is not used and so is set to logic 0. Time-slot 30 carries one bit of the channel status world associated with the audio channel transmitted in the same sub-frame. Time-slot 31 carries a parity bit such that time-slots 4 to 31 inclusive will carry an even number of ones and an even number of zeros. Fig.4 Frame format. handbook, full pagewidth MLB155 M channel 1 sub-frame W channel 2 B channel 1 W channel 2 M channel 1 W channel 2 sub-frame frame 0 start of block frame 1 frame 191 Fig.5 Sub-frame format. handbook, full pagewidth MLB156 sync preamble logical 0 bits audio sample word M S B VU CP L S B 4 0 28 31 27 validity flag user data = logic 0 channel status parity bit 311 12 |
Similar Part No. - SAA7282 |
|
Similar Description - SAA7282 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |