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SAA7184WP Datasheet(PDF) 2 Page - NXP Semiconductors |
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SAA7184WP Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 36 page  1996 Jul 03 2 Philips Semiconductors Preliminary specification Digital Video Encoders (DENC2-M6) SAA7184; SAA7185B FEATURES • CMOS 5 V device • Digital PAL/NTSC encoder • System pixel frequency 13.5 MHz • Accepts MPEG decoded data • 8-bit wide MPEG port • Input data format Cb, Y, Cr etc. (CCIR 656) • 16-bit wide YUV input port • I2C-bus control port or alternatively MPU parallel control port • Encoder can be master or slave • Programmable horizontal and vertical input synchronization phase • Programmable horizontal sync output phase • OVL overlay with Look-Up Tables (LUTs) 8 × 3 bytes • Colour bar generator • Line 21 closed caption encoder • Cross-colour reduction • Macrovision revision_6 Pay-per-View copy protection system as option (SAA7184 only). Remark: This device is protected by U.S. patent numbers 4631603 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anticopy process in the device is licensed for non-commercial home use only. Reverse engineering or disassembly is prohibited. Please contact your nearest Philips Semiconductors sales office for more information. • DACs operating at 27 MHz with 10-bit resolution • Controlled rise and fall times of output syncs and blanking • Down-mode of DACs • CVBS and S-Video output simultaneously • PLCC68 package. GENERAL DESCRIPTION The SAA7184 and SAA7185B digital video encoders 2 (DENC2-M6) encode digital YUV video data to an NTSC or PAL CVBS or S-Video signal. The circuit accepts CCIR compatible YUV data with 720 active pixels per line in 4:2:2 multiplexed formats, for example MPEG decoded data. The device includes a sync/clock generator and on-chip Digital-to-Analog Converters (DACs). The circuit is compatible to the DIG-TV2 chip family. ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION SAA7184WP PLCC68 plastic leaded chip carrier; 68 leads SOT188-2 SAA7185BWP |
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