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SAA7146A Datasheet(PDF) 12 Page - NXP Semiconductors |
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SAA7146A Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 144 page  1998 Apr 09 12 Philips Semiconductors Product specification Multimedia bridge, high performance Scaler and PCI circuit (SPCI) SAA7146A VSSD5 39 P digital ground 5 AD PCI31 40 I/O bidirectional PCI multiplexed address/data bit 31 AD PCI30 41 I/O bidirectional PCI multiplexed address/data bit 30 AD PCI29 42 I/O bidirectional PCI multiplexed address/data bit 29 AD PCI28 43 I/O bidirectional PCI multiplexed address/data bit 28 VDDD6 44 P digital supply voltage 6 (3.3 V) n.c. 45 − reserved pin; not connected internally VSSD6 46 P digital ground 6 AD PCI27 47 I/O bidirectional PCI multiplexed address/data bit 27 AD PCI26 48 I/O bidirectional PCI multiplexed address/data bit 26 AD PCI25 49 I/O bidirectional PCI multiplexed address/data bit 25 AD PCI24 50 I/O bidirectional PCI multiplexed address/data bit 24 VDDD7 51 P digital supply voltage 7 (3.3 V) n.c. 52 − reserved pin; do not connect n.c. 53 − reserved pin; not connected internally VSSD7 54 P digital ground 7 C/BE# [3] 55 I/O bidirectional PCI multiplexed bus command and byte enable 3 (active LOW) IDSEL 56 I PCI initialization device select input signal AD PCI23 57 I/O bidirectional PCI multiplexed address/data bit 23 AD PCI22 58 I/O bidirectional PCI multiplexed address/data bit 22 AD PCI21 59 I/O bidirectional PCI multiplexed address/data bit 21 AD PCI20 60 I/O bidirectional PCI multiplexed address/data bit 20 n.c. 61 − reserved pin; do not connect n.c. 62 − reserved pin; not connected internally VSSD8 63 P digital ground 8 AD PCI19 64 I/O bidirectional PCI multiplexed address/data bit 19 AD PCI18 65 I/O bidirectional PCI multiplexed address/data bit 18 AD PCI17 66 I/O bidirectional PCI multiplexed address/data bit 17 AD PCI16 67 I/O bidirectional PCI multiplexed address/data bit 16 VDDD8 68 P digital supply voltage 8 (3.3 V) n.c. 69 − reserved pin; do not connect VSSD9 70 P digital ground 9 C/BE# [2] 71 I/O bidirectional PCI multiplexed bus command and byte enable 2 (active LOW) FRAME# 72 I/O bidirectional PCI cycle frame signal (active LOW) IRDY# 73 I/O bidirectional PCI initiator ready signal (active LOW) TRDY# 74 I/O bidirectional PCI target ready signal (active LOW) VDDD9 75 P digital supply voltage 9 (3.3 V) n.c. 76 − reserved pin; do not connect VSSD10 77 P digital ground 10 DEVSEL# 78 I/O bidirectional PCI device select signal (active LOW) SYMBOL PIN STATUS DESCRIPTION |
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