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SP805SCP Datasheet(PDF) 4 Page - Sipex Corporation |
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SP805SCP Datasheet(HTML) 4 Page - Sipex Corporation |
4 / 20 page SP690T/S/R JAN 30-06 SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory © 2006 Sipex Corporation 4 SPECIFICATIONS (continued) V CC = 3.17V to 5.50V for the SP690T/SP80_T, VCC = 3.02V to 5.50V for the SP690S/SP80_S, VCC = 2.72V to 5.50V for the SP690R/SP80_R, VBATT = 3.60V, and T A = TMIN to TMAX unless otherwise noted. Typical values taken at TAMB = +25 OC. NOTE 1: The following are tested at V BATT = 3.6V and VCC = 5.5V: VCC supply current, watchdog functionality, logic input leakage, PFI functionality, and the RESET and RESET states. The state of RESET or RESET and PFO is tested at V CC = VCC(min). NOTE 2: Tested V BATT = 3.6V, VCC = 3.5V and 0V. NOTE 3: Leakage current into the battery is tested under the following worst-case conditions: V CC = 5.5V, V BATT = 1.8V and at VCC = 1.5V, VBATT = 1.0V. NOTE 4: "-" equals the battery-charging current, "+" equals the battery-discharging current. NOTE 5: When V SW > VCC > VBATT, VOUT remains connected to VCC until VCC drops below VBATT. The V CC-to-VBATT comparator has a small 25mV typical hysteresis to prevent oscillation. NOTE 6: When V BATT > VCC > VSW, VOUT remains connected to VCC until VCC drops below the battery switch threshold, V SW. NOTE 7: V OUT switches from VBATT to VCC when VCC rises above the reset threshold, independent of V BATT. Switchover back to V CC occurs at the exact voltage that causes RESET to go HIGH (on the SP804_ and SP805_ RESET goes LOW). Switchover occurs 200ms prior to reset. NOTE 8: The reset threshold tolerance is wider for V CC rising than for VCC falling to accommodate the 10mV typical hysteresis, which prevents internal oscillation. NOTE 9: SP690_ and SP802_ devices only. NOTE 10: SP804_ and SP805_ devices only. NOTE 11: The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance). |
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